IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 12 of 12  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
NS 2023-10-05
Hokkaido Hokkaidou University + Online
(Primary: On-site, Secondary: Online)
[Invited Lecture] Analysis of Elapsed Time Length in Reduced Burst Score Aggregation for Suppressing Delayed-hit Caching Effects
Feri Fahrianto (UIN Jakarta), Noriaki Kamiyama (Ritsumeikan Univ.)
(To be available after the conference date) [more]
Okinawa Okinawa Convention Centre + Online
(Primary: On-site, Secondary: Online)
Reduced Burst Score Aggregation in Suppressing Delayed-Hit Caching Effects
Feri Fahrianto (Fukuoka Univ.), Noriaki Kamiyama (Ritsumeikan Univ.) NS2022-168
Caching has been proven to increase network connectivity against popular content. Caching strategy, notably the cache re... [more] NS2022-168
NS 2022-10-06
Hokkaido Hokkaidou University + Online
(Primary: On-site, Secondary: Online)
[Invited Lecture] Cache replacing method using burst score aggregation to suppress delayed caching effects
Feri Fahrianto (Fukuoka Univ.), Noriaki Kamiyama (Ritsumeikan Univ.) NS2022-91
An online-caching system such as Content Delivery Network (CDN), Proxy, or Gateway, uses a caching method to enhance net... [more] NS2022-91
CAS, ICTSSL 2021-01-28
Online Online A Hardware Implementation of Neural Networks using HDLRuby, a Ruby-based Hardware Description Language
Ryota Sakai, Yuki Maehara, Lovic Gauthier (NITAC) CAS2020-53 ICTSSL2020-38
In the recent years, FPGAs have been attracting attention as neural network accelerators for their superior performance ... [more] CAS2020-53 ICTSSL2020-38
CAS, ICTSSL 2021-01-28
Online Online Study of a Hardware Implementation of a Long Short-Term Memory with HDLRuby
Yuki Maehara, Ryota Sakai, Lovic Gauthier (NITAC) CAS2020-54 ICTSSL2020-39
In the recent years, many global companies have attempted to use FPGA for implementing applications in the field of AI s... [more] CAS2020-54 ICTSSL2020-39
CS 2019-07-05
Kagoshima Amami City Social Welfare Center Reflecting user location to caching based on network delay in NDN
Naoki Yamaguchi (Waseda Univ.) CS2019-45
At the time of design of the Internet, the content request that currentry occupies most of the traffic was not assumed.I... [more] CS2019-45
R 2019-05-24
Aichi Aichi Institute of Technology, Motoyama Campus [Invited Talk] Determining line replaceable units in multi-level systems
Won Young Yun, Jae Yoon Yoo (PNU) R2019-8
This talk deals with a maintenance optimization problem of multi-level systems. Multi-level systems consist of modules a... [more] R2019-8
(Joint) [detail]
Kumamoto Kumamoto City International Center Analysis of commercial cloud workload and study on how to apply cache methods
Kazuichi Oe, Kazutaka Ogihara (FLABO), Takeo Honda (FST) CPSY2018-14
We analyzed some storage workloads of the FUJITSU K5 cloud service, which was built using the
OpenStack platform, to cl... [more]
PN 2017-08-29
Hokkaido Toya Kanko Hotel Proposal of the Data Center-centric Flow Classification Method using Traffic Paterns
Yukihiro Imakiire, Takehiro Sato, Satoru Okamoto, Naoaki Yamanaka (Keio Univ.) PN2017-25
Introduction of optical switching networks into Data Center networks (DCNs) attracts attention to reduce power consumpti... [more] PN2017-25
IA 2012-10-18
Overseas Phuket LessFU: A Memory Management Strategy
Kenichi Yoshida, Kazuhiko Tsuda (Univ. of Tsukuba) IA2012-40
LRU is a standard memory management strategy. Although it is used in various situations, LRU cannot achieve good perform... [more] IA2012-40
Miyazaki Miyazaki Seagia Design of Time-Out Aging Cache for Bursty Traffic
Souta Hatakeyama, Masaki Aida (TMU), Mika Ishizuka (NTT) IN2011-164
Ethernet is widely used in various situations. In this paper, we study a design method of time-out aging cache for appli... [more] IN2011-164
KBSE, JSAI-KBS 2005-01-24
Kanagawa Keio University Random is better than LRU ?
Kenichi Yoshida (U.Tsukuba), Masato Tsuru (kyutech), Satoshi Katsuno (kddilabs)
In this paper, we propose a cache-based frequent item finding approach. By analyzing the characteristics of the proposed... [more] KBSE2004-30
 Results 1 - 12 of 12  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

[Return to Top Page]

[Return to IEICE Web Page]

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan