Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
RECONF |
2023-09-14 16:30 |
Tokyo |
Tokyo University of Agriculture and Technology Koganei campus (Primary: On-site, Secondary: Online) |
RECONF2023-23 |
Several research institutes and companies have developed FPGA clusters as one of the methods for accelerating large-scal... [more] |
RECONF2023-23 pp.15-17 |
SeMI, RCS, RCC, NS, SR (Joint) |
2023-07-12 15:50 |
Osaka |
Osaka University Nakanoshima Center + Online (Primary: On-site, Secondary: Online) |
[Invited Talk]
Neural computing in wireless IoT network Naoki Wakamiya (Osaka Univ.) RCC2023-15 NS2023-33 RCS2023-85 SR2023-32 SeMI2023-26 |
Collection, management, and processing data at the edge of an IoT system is effective in distribution of communication a... [more] |
RCC2023-15 NS2023-33 RCS2023-85 SR2023-32 SeMI2023-26 p.8(RCC), p.8(NS), p.32(RCS), p.32(SR), p.26(SeMI) |
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] |
2022-11-29 15:05 |
Kumamoto |
(Primary: On-site, Secondary: Online) |
Evaluation of power delivery networks in secure semiconductor systems Masaru Mashiba, Kazuki Monta (Kobe Univ.), Takaaki Okidono (SCU), Takuzi Miki, Makoto Nagata (Kobe Univ.) VLD2022-33 ICD2022-50 DC2022-49 RECONF2022-56 |
With the development of the IoT, hardware security is becoming increasingly important. Physical attacks on cryptoprocess... [more] |
VLD2022-33 ICD2022-50 DC2022-49 RECONF2022-56 pp.82-86 |
NLP |
2022-11-24 16:40 |
Shiga |
(Primary: On-site, Secondary: Online) |
Photonic reservoir computing with optical microcavities Kohei Arai, Tomoya Yamaguchi, Tomoaki Niiyama, Satoshi Sunada (Kanazawa Univ.) NLP2022-67 |
Neural networks (NNs), which mimic the function of neural circuits in the brain, use electrons to perform arithmetic ope... [more] |
NLP2022-67 pp.43-48 |
CPSY, DC, IPSJ-ARC [detail] |
2022-10-12 09:00 |
Niigata |
Yuzawa Toei Hotel (Primary: On-site, Secondary: Online) |
Design and Implementation of Network Protocol for Shape-Changeable Computer System Shun Nagasaki, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai (UTokyo) CPSY2022-21 DC2022-21 |
Shape-changeable computer system, in which a large number of computer chips arranged next to each other communicate wire... [more] |
CPSY2022-21 DC2022-21 pp.20-25 |
CPSY, DC, IPSJ-ARC [detail] |
2022-07-29 11:00 |
Yamaguchi |
Kaikyo Messe Shimonoseki (Primary: On-site, Secondary: Online) |
Efficient placement of coherence directories in memory networks Yuki Kameyama, Naoya Niwa, Daichi Fujiki (Keio Univ.), Michihiro Koibuchi (NII), Hidearu Amano (Keio Univ.) CPSY2022-14 DC2022-14 |
Memory Cube (MC) is a memory module that manages three-dimensional stacking of DRAM chips with a logic layer on the bott... [more] |
CPSY2022-14 DC2022-14 pp.77-82 |
RECONF |
2022-06-07 14:25 |
Ibaraki |
CCS, Univ. of Tsukuba (Primary: On-site, Secondary: Online) |
Performance Evaluation of Fault-Tolerant Routing Methods Using NAS Parallel Benchmarks Yota Kurokawa, Masaru Fukushi (Yamaguchi Univ.) RECONF2022-4 |
This paper proposes an evaluation method of fault-tolerant routing methods developed for Network-on-Chips (NoCs) using p... [more] |
RECONF2022-4 pp.20-25 |
VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-01 10:35 |
Online |
Online |
Basic evaluation of ReNA, a DNN accelerator using numerical representation posit Yasuhiro Nakahara, Yuta Masuda, Masato Kiyama, Motoki Amagasaki, Masahiro Iida (Kumamoto Univ.) VLD2021-24 ICD2021-34 DC2021-30 RECONF2021-32 |
In Convolutional Neural Network (CNN) accelerators for edge, numerical precision of data should be reduced as much as po... [more] |
VLD2021-24 ICD2021-34 DC2021-30 RECONF2021-32 pp.43-48 |
VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-01 15:35 |
Online |
Online |
Determining Optimal Number of Layers for Network-Flow-based Sample Preparation Akira Ishida, Shigeru Yamashita (Ritsumeikan Univ.) VLD2021-29 ICD2021-39 DC2021-35 RECONF2021-37 |
Sample preparation is an indispensable process when we perform biochemical experiments on DMFBs. There exists an optimal... [more] |
VLD2021-29 ICD2021-39 DC2021-35 RECONF2021-37 pp.72-77 |
CCS |
2021-11-19 13:00 |
Osaka |
Osaka Univ. (Primary: On-site, Secondary: Online) |
Physical reservoir computing on analog-digital hybrid circuit systems consisting of discrete semiconductor devices Yuki Abe, Kose Yoshida (Hokkaido Univ), Megumi Akai-Kasaya (Hokkaido Univ/Osaka Univ), Tetsuya Asai (Hokkaido Univ) CCS2021-30 |
This report describes machine learning process & benchmarks by using physical reservoir computing device. We design phys... [more] |
CCS2021-30 pp.73-78 |
RECONF |
2021-06-08 16:10 |
Online |
Online |
Automatic generation of executable code for ReNA Yuta Masuda, Yasuhiro Nakahara, Motoki Amagasaki, Masahiro Iida (Kumamoto Univ.) RECONF2021-6 |
We have been developing ReNA as a CNN accelerator for the edge, which is controlled by directly specifying control signa... [more] |
RECONF2021-6 pp.26-31 |
VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-17 10:45 |
Online |
Online |
Implementation of YOLO in the AI accelerator ReNA Toma Uemura, Yasuhiro Nakahara, Motoki Amagasaki, Masato Kiyama, Masahiro Iida (Kumamoto Univ.) VLD2020-22 ICD2020-42 DC2020-42 RECONF2020-41 |
The object detection,which is a typical AI process,has been attracting attention in various fields because it can identi... [more] |
VLD2020-22 ICD2020-42 DC2020-42 RECONF2020-41 pp.66-71 |
CQ, CS (Joint) |
2020-06-25 11:00 |
Online |
Online |
Real-time ADX-RoF based fronthaul for (B)5G radio access network Paikun Zhu (GPI), Yuki Yoshida (NICT), Ken-ichi Kitayama (GPI) CS2020-1 |
In this work, we present real-time digital signal processing (DSP) design on a single-chip field-programmable (FPGA) rad... [more] |
CS2020-1 pp.1-4 |
DC |
2020-02-26 10:25 |
Tokyo |
|
Defective Chip Prediction Modeling Using Convolutional Neural Networks Ryunosuke Oka, Satoshi Ohtake (Oita Univ.), Kouichi Kumaki (Renesas) DC2019-87 |
In recent years, the cost of LSI testing which guarantees reliability has relatively increased due to the development of... [more] |
DC2019-87 pp.7-12 |
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-14 10:05 |
Ehime |
Ehime Prefecture Gender Equality Center |
DNN accelerator for AI edge computing Yasuhiro Nakahara, Juntaro Chikama, Motoki Amagasaki (Kumamoto Univ.), Zhao Qian (Kyutech), Masahiro Iida (Kumamoto Univ.) RECONF2019-38 |
Convolutional Neural Network (CNN), a kind of artificial intelligence for image recognition, is used in
various fields ... [more] |
RECONF2019-38 pp.15-20 |
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-14 14:15 |
Ehime |
Ehime Prefecture Gender Equality Center |
Neural Network-based Lifetime Prediction and Reliability Enhancement Techniques for 3D NAND Flash Memory Masaki Abe, Ken Takeuchi (Chuo Univ.) ICD2019-30 IE2019-36 |
NAND flash memories have lifetime such as data-retention time and read cycles. This paper proposes neural network techni... [more] |
ICD2019-30 IE2019-36 pp.7-12 |
NS |
2019-04-18 14:50 |
Kagoshima |
Tenmonkan Vision Hall |
[Invited Talk]
The Trend of P4 Technology which Enable Programming of ASIC Yuki Takei, Masato Nishiguchi, Masayuki Nishiki, Tomonori Takeda, Takayuki Fujiwara, Takamichi Kikkawa (NTT) NS2019-8 |
P4 is a programming language developed for the purpose of programming packet processing of network devices. It enables e... [more] |
NS2019-8 pp.43-48 |
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] |
2019-03-17 16:10 |
Kagoshima |
Nishinoomote City Hall (Tanega-shima) |
Design of Vector Unit for AI Acceleration in Embedded Processor Yosuke Ide, Hiromi Suzuki, Yuki Mori, Nobuyuki Yamasaki (Keio Univ.) CPSY2018-107 DC2018-89 |
In recent years, AI is applied in wide range of fields. Its learning and recognition are based on Neural Network (NN), w... [more] |
CPSY2018-107 DC2018-89 pp.167-172 |
OFT, OCS, OPE (Joint) [detail] |
2019-02-14 17:20 |
Fukuoka |
|
Performance evaluation of large-scale optical circuit switch for data centers Mungun-Erdene Ganbold, Yojiro Mori, Ken-ichi Sato (NU) OCS2018-86 OPE2018-201 |
We evaluate the performance of large-scale optical circuit switch that uses monolithically integrated optical space swit... [more] |
OCS2018-86 OPE2018-201 pp.35-38(OCS), pp.47-50(OPE) |
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-05 09:30 |
Hiroshima |
Satellite Campus Hiroshima |
Design Automation and Optimal Architecture of NLoC Yuto Umeda, Shigeru Yamashita (Ritsumeikan Univ.) VLD2018-40 DC2018-26 |
In Networked Labs-on-Chip (NLoC), droplets of reagents flow in closed channels.
It is expected that the discrete model... [more] |
VLD2018-40 DC2018-26 pp.1-6 |