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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| DC, CPSY, IPSJ-ARC [detail] | 2020-10-12 14:10 |
Online | Online | Soft error tolerant SR latch using C-element Ibuki Nakata, Kazuteru Namba (Chiba Univ)  CPSY2020-19 DC2020-19 |
VLSI systems have become downsized, high integrated and low-power. As a result, the incidence of soft errors is increasi... [more] | CPSY2020-19 DC2020-19 pp.12-15 |
| ICD, CPSY, CAS | 2017-12-14 15:10 |
Okinawa | Art Hotel Ishigakijima | Study on acceleration of Paralleled Linear Feedback Shift Register PRBS Generator Keisuke Iyama, Masaki Ishii, Masahiro Sasaki (SIT) CAS2017-85 ICD2017-73 CPSY2017-82 |
The operation speed of the on-chip test pattern generator that tests normal operation of LSI chip is determined by the p... [more] | CAS2017-85 ICD2017-73 CPSY2017-82 p.99 |
| ICD, CPM, ED, EID, EMD, MRIS, OME, SCE, SDM, QIT (Joint) [detail] |
2017-01-31 15:25 |
Hiroshima | Miyajima-Morino-Yado(Hiroshima) | A 5.92-Mb/mm2 28-nm Pseudo 2-Read/Write Dual-Port SRAM Using Double Pumping Circuitry Yuichiro Ishii, Makoto Yabuuchi, Yohei Sawada, Masao Morimoto, Yasumasa Tsukamoto (Renesas Electronics), Yuta Yoshida, Ken Shibata, Toshiaki Sano (Renesas System Design), Shinji Tanaka, Koji Nii (Renesas Electronics) EMD2016-86 MR2016-58 SCE2016-64 EID2016-65 ED2016-129 CPM2016-130 SDM2016-129 ICD2016-117 OME2016-98 |
We propose pseudo dual-port (DP) SRAM by using 6T single-port (SP) SRAM bitcell with double pumping circuitry, which ena... [more] | EMD2016-86 MR2016-58 SCE2016-64 EID2016-65 ED2016-129 CPM2016-130 SDM2016-129 ICD2016-117 OME2016-98 pp.87-92 |
| ICD | 2011-12-16 14:50 |
Osaka | Multiple-Bit-Upset and Single-Bit-Upset Resilient 8T SRAM Bitcell Layout with Divided Wordline Structure Yohei Umeki, Shusuke Yoshimoto, Takurou Amashita, Hiroshi Kawaguchi (Kobe Univ.), Masahiko Yoshimoto (Kobe Univ./JST) ICD2011-134 |
This paper presents a new 8T (8-transistor) SRAM cell layout mitigating multiple-bit upset (MBU) in a divided wordline s... [more] | ICD2011-134 pp.161-166 |
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| ICD, ITE-IST | 2011-07-21 09:55 |
Hiroshima | Hiroshima Institute of Technology | A Sense Amplifier with High Speed Pre-Charge Operation for Ultra-Low-Voltage SRAM Chotaro Masuda, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa (Kove Univ.) ICD2011-22 |
We propose a current latch sense amplifier with a current-reuse technique (CLSA-w/CR). The CLSA-w/CR is capable of hig... [more] |
ICD2011-22 pp.7-12 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2009-12-02 13:50 |
Kochi | Kochi City Culture-Plaza | [Invited Talk]
Failures due to Terrestriall Neutrons in Most Advanced Semicondutor Devices
-- Impacts and Hardening Techniques down to 22nm Design Rule -- Eishi Ibe, Kenichi Shimbo, Hitoshi Taniguchi, Tadanobu Toba (Hitachi, Ltd.) CPM2009-139 ICD2009-68 |
The status-of-the-art in failures and their mechanisms of CMOS memories and logic gates induced by terrestrial neutrons ... [more] | CPM2009-139 ICD2009-68 pp.29-34 |
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