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All Technical Committee Conferences (Searched in: Recent 10 Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
DC |
2025-02-18 15:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. (Tokyo) |
A Status Signal Sequence Generation Method to Improve Optimistically Estimated Field Random Testability Kyosuke Hirose, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.) DC2024-114 |
(To be available after the conference date) [more] |
DC2024-114 pp.47-52 |
SS, DC |
2021-10-19 13:55 |
Online |
Online (Online) |
Predict failure of test case generation Ryo Soga, Hideyuki Kanuka (Hitachi, Ltd.) SS2021-14 DC2021-19 |
The automation tools for improving productivity of software development are abandoned at times due to lower-than-expecte... [more] |
SS2021-14 DC2021-19 pp.7-12 |
SS |
2021-03-04 13:25 |
Online |
Online (Online) |
Generating Exhaustive Counterexample and Path Constraint with Software Analysis Workbench and Symbolic PathFinder Rin Karashima, Shinpei Ogata, Kozo Okano (Shinshu Univ.) SS2020-41 |
Software Analysis Workbench (SAW) generates models from JVM bytecode by symbolic execution.
Users can perform model che... [more] |
SS2020-41 pp.78-83 |
DC |
2021-02-05 15:30 |
Online |
Online (Online) |
A Don't Care Filling Method of Control Signals Based on Non-scan Field Testability at Register Transfer Level Yuki Ikegaya, Yuta Ishiyama, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.) DC2020-77 |
A field testing that monitors the values of circuit outputs and internal signal lines during function mode is used as on... [more] |
DC2020-77 pp.48-53 |
SS |
2017-03-09 11:50 |
Okinawa |
(Okinawa) |
Equivalence Checking for Methods in Java and Its Applications Kozo Okano (Shinshu Univ.), Satoshi Harauchi (Mitsubishi Electric Corp.), Shinpei Ogata (Shinshu Univ.), Toshifusa Sekizawa (Nihon Univ.), Takeshi Obara (Shinshu Univ.) SS2016-65 |
A programmer sometimes implements both of equals method and hashCode method in a class of Java. The programmer should ob... [more] |
SS2016-65 pp.31-36 |
KBSE |
2016-05-27 10:00 |
Tokyo |
Doshisha Univ. Tokyo Branch Office (Tokyo) |
Reducing the number of mutants with equivalent bug detection ability Tomohiro Ueno, Hirohide Haga (Doshisha Univ.) KBSE2016-5 |
Mutation analysis is a method to evaluate the software test cases set quality. In mutation analysis, mutant programs are... [more] |
KBSE2016-5 pp.25-30 |
MSS, CAS, SIP, VLD |
2015-06-18 10:10 |
Hokkaido |
Otaru University of Commerce (Hokkaido) |
Software model checking of embedded assembly programs by symbolic execution Ryosuke Konoshita, Satoshi Yamane (Kanazawa Univ.) CAS2015-15 VLD2015-22 SIP2015-46 MSS2015-15 |
We have developed a software verification system for embedded assembly programs.
It dynamically generates a model by th... [more] |
CAS2015-15 VLD2015-22 SIP2015-46 MSS2015-15 pp.77-81 |
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