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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, CPSY, RECONF, CPM, ICD, IE
(Joint) [detail]
2016-11-28
15:30
Osaka Ritsumeikan University, Osaka Ibaraki Campus Circuit Simulation Method Using Bimodal Defect-Centric Model of Random Telegraph Noise on 40 nm SiON Process
Michitarou Yabuuchi, Azusa Oshima, Takuya Komawaki, Kazutoshi Kobayashi, Ryo Kishida, Jun Furuta (KIT), Pieter Weckx (KUL/IMEC), Ben Kaczer (IMEC), Takashi Matsumoto (Univ. of Tokyo), Hidetoshi Onodera (Kyoto Univ.) VLD2016-52 DC2016-46
We propose a circuit analysis method using the bimodal RTN (random telegraph
noise) model of the defect-centric distri... [more]
VLD2016-52 DC2016-46
pp.49-54
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