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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 11 of 11  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
EE 2023-01-20
Fukuoka Kyushu Institute of Technology
(Primary: On-site, Secondary: Online)
Design of fast ramping-up boost converters for NAND Flash
Yuji Kanayama, Tanazawa Toru (Shizuoka Univ.) EE2022-44
A boost circuit is used to charge the word line capacitance load to a high voltage for writing and erasing the data in S... [more] EE2022-44
CAS, CS 2017-02-24
Shiga   [Invited Talk] Circuit-Oriented Modeling and Analysis Methods Toward the Fast Simulation of Power Delivery Network
Tadatoshi Sekine (Shizuoka Univ.) CAS2016-128 CS2016-89
In this report, I introduce efficient modeling and analysis methods for the fast simulation of power delivery networks (... [more] CAS2016-128 CS2016-89
CAS, SIP, MSS, VLD, SIS [detail] 2014-07-10
Hokkaido Hokkaido University Fast Transient Analysis of Non-uniform Distributed Parameter Circuit by Using Stabilized Explicit Method
Kaoru Nakagaki, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) CAS2014-29 VLD2014-38 SIP2014-50 MSS2014-29 SIS2014-29
In general, an explicit method in numerical analysis has a strict stability condition related to a time step size. In th... [more] CAS2014-29 VLD2014-38 SIP2014-50 MSS2014-29 SIS2014-29
VLD 2014-03-03
Okinawa Okinawa Seinen Kaikan Fast Simulation of Multilayered Power Distribution Networks by Using Conformal Mesh Model and Block-Type Leapfrog Scheme
Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) VLD2013-136
In this report, we propose an equivalent circuit modeling technique of a multilayered power distribution network based o... [more] VLD2013-136
VLD, CAS, MSS, SIP 2012-07-03
Kyoto Kyoto Research Park Fast Simulation of Multiconductor Transmission Lines Using Nodal Block Relaxation (NBR) Method
Takahiro Takasaki, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) CAS2012-15 VLD2012-25 SIP2012-47 MSS2012-15
This paper describes a nodal block relaxation (NBR) method in which the block relaxation method is applied to the nodal ... [more] CAS2012-15 VLD2012-25 SIP2012-47 MSS2012-15
CAS, NLP 2011-10-20
Shizuoka Shizuoka Univ. Fast Circuit Simulation Based on Improved Latency Insertion Method with Predictor-Corrector Method
Hiroki Kurobe, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) CAS2011-39 NLP2011-66
This report describes an improved latency insertion method (LIM) with predictor-corrector method for the fast transient ... [more] CAS2011-39 NLP2011-66
CAS, NLP 2011-10-20
Shizuoka Shizuoka Univ. Fast Simulation of Multiconductor System with Nonlinear Devices by Using Block-Latency Insertion Method and Reduced Order Model
Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) CAS2011-41 NLP2011-68
This paper describes a fast circuit simulation technique based on the block-latency insertion method (block-LIM) and a m... [more] CAS2011-41 NLP2011-68
CS, SIP, CAS 2011-03-03
Okinawa Ohhamanobumoto memorial hall (Ishigaki)( A Design of Analog FFT Processor with CMOS Switched Capacitors
Hiromu Takano, Yohtaro Umeda, Osamu Takyu (Tokyo Univ. of Science) CAS2010-130 SIP2010-146 CS2010-100
Cognitive radio is considered as the highly promising solution to the shortage problem of the frequency resources. In th... [more] CAS2010-130 SIP2010-146 CS2010-100
MSS, CAS 2010-11-19
Osaka Kansai Univ. ADE-LIM for the Fast Transient Simulation of Multiconductor Transmission Lines and Its Estimation
Hiroki Kurobe, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) CAS2010-78 CST2010-51
This report describes an application techique of the alternating direction explicit-latency insertion mehod (ADE-LIM) to... [more] CAS2010-78 CST2010-51
OPE, EMT, LQE, PN, IEE-EMT 2010-01-28
Kyoto   Computer Simulation of 2-Dimensional Photonic Crystal Waveguide by Fast Multipole Method
Masahiro Tanaka, Kazuo Tanaka (Gifu Univ.) PN2009-40 OPE2009-178 LQE2009-160
In this paper, we perform computer simulation of 2-dimensional optical circuits composed of photonic crystal waveguide a... [more] PN2009-40 OPE2009-178 LQE2009-160
WBS, IT, ISEC 2006-03-16
Aichi Nagoya Univ. A study on the circuit with rapid acquisition and small tracking error for DSSS UWB radar
Kenji Konda, Yasunori Iwanami, Eiji Okamoto (NIT), Hiroyuki Kida (JRC)
In this paper, we have considered a precise measurement scheme of short distance by using a DSSS (Direct Sequence Spread... [more] IT2005-71 ISEC2005-128 WBS2005-85
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