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Committee Date Time Place Paper Title / Authors Abstract Paper #
SCE 2019-01-23
13:30		 Tokyo   Development of 30-GHz Datapath for Bit-Parallel, Gate-Level-Pipelined Rapid Single-Flux-Quantum Microprocessors
Ikki Nagaoka (Nagoya Univ), Yuki Hatanaka (Mitsubishi Elec), Yuichi Matsui (Nagoya Univ), Koki Ishida (Kyushu Univ), Masamitsu Tanaka, Kyosuke Sano, Taro Yamashita (Nagoya Univ), Takatsugu Ono, Koji Inoue (Kyushu Univ), Akira Fujimaki (Nagoya Univ) SCE2018-30		 We have started development of high-throughput single-flux-quantum (SFQ) microprocessors with the aim of higher throughp... [more] SCE2018-30
pp.29-34
VLD, DC, CPSY, RECONF, CPM, ICD, IE
(Joint) [detail]		 2016-11-30
13:20		 Osaka Ritsumeikan University, Osaka Ibaraki Campus Design of High-Speed Low-Power Analog-to-Digital Converter for a Nonvolatile Micro-controller -- High-Speed Low-Power Reference-Less SAR-ADC --
Tamakoshi Akira, Masanori Natsui, Takahiro Hanyu (Touhoku Univ.) CPM2016-86 ICD2016-47 IE2016-81		 A high-speed low-power successive-approximation-type analog-to-digital converter (SAR ADC) is proposed for a key module ... [more] CPM2016-86 ICD2016-47 IE2016-81
pp.51-56
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