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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 28  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
ET 2018-06-16
13:10
Aichi Nanzan University Educational Embedded System using Optical Transmisson of Virtual Machine Code
Yosuke Senta (Kurume IT) ET2018-12
In one day college,
it is more exciting to use actual robots or colorful led substrates in the
programming practice. ... [more]
ET2018-12
pp.1-6
SCE 2017-08-09
14:35
Aichi Nagoya Univ. (Higashiyama Campus) Design of Component Circuits for Rapid Single-Flux-Quantum Gate-Level-Pipelined Microprocessors
Yuki Hatanaka, Yuichi Matsui, Masamitsu Tanaka, Kyosuke Sano, Akira Fujimaki (Nagoya Univ.), Koki Ishida, Takatsugu Ono, Koji Inoue (Kyushu Univ.) SCE2017-17
We have started development of high-throughput rapid single-flux-quantum (RSFQ) microprocessors with the aim of higher p... [more] SCE2017-17
pp.37-42
ICD 2017-04-21
09:35
Tokyo   [Invited Lecture] Architectures and energy performance of nonvolatile SRAM for core-level nonvolatile power-gating
Daiki Kitagata, Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara (Tokyo Inst. of Tech.) ICD2017-10
Architectures and energy performance of nonvolatile SRAM (NV-SRAM) are demonstrated for nonvolatile power-gating (NVPG) ... [more] ICD2017-10
pp.51-56
ICD, CPSY 2016-12-15
15:30
Tokyo Tokyo Institute of Technology [Poster Presentation]
Itaru Hida, Shinya Takamaeda, Masayuki Ikebe, Masato Motomura, Tetsuya Asai (Hokkaido Univ.) ICD2016-60 CPSY2016-66
In this paper, we propose a Bayesian branch prediction circuit consisting of an instruction-feature extractor and a naiv... [more] ICD2016-60 CPSY2016-66
p.39
SCE 2016-04-20
14:40
Tokyo   On-chip Implementation of Random-Access-Memory and RSFQ Microprocessor with High-Functionality
Ryo Sato (Nagoya Univ.), Yuki Ando (Kyoto Univ.), Masamitsu Tanaka, Akira Fujimaki (Nagoya Univ.), Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) SCE2016-5
The single flux quantum (SFQ) microprocessor demonstrated so far was not able to run meaningful programs due to the limi... [more] SCE2016-5
pp.25-30
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2015-12-03
11:15
Nagasaki Nagasaki Kinro Fukushi Kaikan Logic Design of A Single-Flux-Quantum Microprocessor
Koki Ishida, Tomonori Tsuhata (Kyushu Univ.), Masamitsu Tanaka (Nagoya Univ.), Takatsugu Ono, Koji Inoue (Kyushu Univ.) CPSY2015-73
CMOS microprocessors have been facing a limitation for clock speed improvement because of increasing
computing power. U... [more]
CPSY2015-73
pp.69-74
VLD 2014-03-04
16:10
Okinawa Okinawa Seinen Kaikan [Memorial Lecture] Co-simulation Framework for Streamlining Microprocessor Development on Standard ASIC Design Flow
Tomoyuki Nakabayashi, Tomoyuki Sugiyama, Takahiro Sasaki (Mie Univ.), Eric Rotenberg (NCSU), Toshio Kondo (Mie Univ.) VLD2013-154
As a processor has commonly employed complex microarchitecture, designing a state-of-the-art processor with less effort ... [more] VLD2013-154
p.113
NC, MBE
(Joint)
2013-11-23
11:40
Miyagi Tohoku University The training system to assist the improvement of the rifle shooting score in the house
Youichi Shimada (KIT) MBE2013-74
To improve the score of prone match with small bore rifle, it is desired to practice with own rifle radiating laser be... [more] MBE2013-74
pp.45-48
SCE 2013-07-22
10:15
Tokyo Kikaishinkou-kaikan Bldg. Design and evaluation of data-path for low-power single-flux-quantum microprocessors
Yuhi Hayakawa, Kensuke Takata, Masamitsu Tanaka, Akira Fujimaki (Nagoya Univ.) SCE2013-11
We have designed data-path prototypes using the single-flux-quantum (SFQ) circuits fabricated with the AIST 10 kA/cm2 Nb... [more] SCE2013-11
pp.5-10
ICD, ITE-IST 2013-07-04
14:35
Hokkaido San Refre Hakodate [Invited Talk] The Evolutional Directions of Automotive Semiconductors -- From the Viewpoint of Computing and Sensing Technologies --
Hideaki Ishihara (DENSO) ICD2013-30
The evolutional directions of automotive systems in the 21st century will be driven by advances in such fields as energy... [more] ICD2013-30
pp.35-36
ICD, IPSJ-ARC 2012-01-20
13:10
Tokyo   [Invited Talk] Overview of High Performance Digital Processor Technology
Hiroo Hayashi (Toshiba Corp.) ICD2011-141
Evolution of high-performance digital technology has been ongoing. The author surveys the technology trends of high-per... [more] ICD2011-141
pp.73-76
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2008-11-19
10:50
Fukuoka Kitakyushu Science and Research Park Power Noise Analysis Acceleration Technique by Linear Programming Method
Takeshi Gomakubo, Goro Suzuki (The Univ. of Kitakyushu) VLD2008-89 DC2008-57
Power noise analysis method using linear programming has been proposed. This method becomes very time consuming in the ... [more] VLD2008-89 DC2008-57
pp.177-182
DC, CPSY 2008-04-23
11:00
Tokyo Tokyo Univ. A Lightweight Write Error Detection for Register-file Using Improved Passive WAB
Hidetsugu Irie, Ken Sugimoto, Ryota Shioya (U-Tokyo), Kenichi Watanabe (Hitachi), Masahiro Goshima, Shuichi Sakai (U-Tokyo) CPSY2008-3 DC2008-3
Recently, it has been getting inefficient to design microprocessors with worst-case margins because of increasing proces... [more] CPSY2008-3 DC2008-3
pp.13-18
DC, CPSY, IPSJ-SLDM, IPSJ-EMB 2008-03-27
08:45
Kagoshima   An Adaptive Multi-Performance Processor and its Evaluation
Seiichiro Yamaguchi, Yuichiro Oyama (Kyushu Univ.), Yuji Kunitake (Kyushu Inst. of Tech.), Tadayuki Matsumura, Yuriko Ishitobi, Masaki Yamaguchi, Donghoon Lee, Yusuke Kaneda (Kyushu Univ.), Toshimasa Funaki (Kyushu Inst. of Tech.), Masanori Muroyama, Tohru Ishihara, Toshinori Sato (Kyushu Univ.) DC2007-84 CPSY2007-80
This paper presents an energy efficient processor which can be used as a design alternative for the dynamic voltage scal... [more] DC2007-84 CPSY2007-80
pp.1-6
CPM, ICD 2008-01-17
13:40
Tokyo Kikai-Shinko-Kaikan Bldg [Special Invited Talk] Techniques for power supply noise management in the SX supercomputers
Jun Inasaka, Mikihiro Kajita (NEC Corp.) CPM2007-135 ICD2007-146
NEC has developed supercomputers "SX" using the leading-edge LSI technologies. In the latest microprocessors, CMOS trans... [more] CPM2007-135 ICD2007-146
pp.41-46
VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC
(Joint) [detail]
2007-11-21
14:15
Fukuoka Kitakyushu International Conference Center The technical comparison of Digital Media Processor and Dynamically Reconfigurable Processor
Kazuo Yamada, Takao Naito (Fuji Xerox) RECONF2007-37
Since Fuji Xerox released a high-speed imaging system (a brand name "image compression" kit) that is implemented the dig... [more] RECONF2007-37
pp.7-12
ICD, IPSJ-ARC 2007-05-31
15:00
Kanagawa   [Invited Talk] The challenge of continually increasing computer power
Aiichiro Inoue (Fujitsu)
In accordance with Moore’s Law, CPU performance has enjoyed a steady 2x performance increase every 1.5 years; this has l... [more] ICD2007-23
pp.37-42
SCE 2007-01-26
11:20
Tokyo SRL Development of pipelined bit-serial single-flux-quantum microprocessors
Masamitsu Tanaka (Nagoya Univ.), Yuki Yamanashi (Yokohama National Univ.), Naoki Irie (Nagoya Univ.), Heejoung Park (Yokohama National Univ.), Shingo Iwasaki (Nagoya Univ.), Kazuhiro Taketomi (Yokohama National Univ.), Akira Fujimaki (Nagoya Univ.), Nobuyuki Yoshikawa (Yokohama National Univ.), Hirotaka Terai (NICT), Shinichi Yorozu (NEC)
A pipelined single-flux-quantum microprocessor, called CORE1$\beta$ has been designed and its perfect operations have be... [more] SCE2006-33
pp.19-24
ICD, IPSJ-ARC 2006-06-08
13:00
Kanagawa   [Special Invited Talk] The need of a collaboration between the computer architecture and the integrated circuit technology
Hisashige Ando (Fujitsu Ltd.)
Moor's law continuously gives us more transistors. But, recently, increase in power dissipation becomes the limiting fac... [more] ICD2006-44
pp.25-30
ICD, IPSJ-ARC 2006-06-09
15:45
Kanagawa   [Panel Discussion] How do we create combining architecture and integrated circuits?
Kunio Uchiyama (Hitachi, Ltd.,)
(To be available after the conference date) [more] ICD2006-59
p.107
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