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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 94  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
EE 2023-01-20
11:25
Fukuoka Kyushu Institute of Technology
(Primary: On-site, Secondary: Online)
Online junction temperature measurement of Power MOSFET by dynamic VGS-ID monitoring system
Yandagkhuu Bayarsaikhan, Ichiro Omura (KIT) EE2022-46
As the demand for high reliability in power electronics systems increases, the online condition monitoring of power devi... [more] EE2022-46
pp.111-116
SDM 2022-10-19
16:30
Online Online [Invited Talk] Reliability improvement of SiC MOSFET by high-temperature CO2 annealing
Takuji Hosoi (Kwansei Gakuin Univ.), Takayoshi Shimura, Heiji Watanabe (Osaka Univ.) SDM2022-62
Threshold voltage instability is one of the reliability concerns for SiC MOSFETs. NO post-oxidation annealing (NO-POA) i... [more] SDM2022-62
pp.34-37
SDM 2022-10-19
17:20
Online Online A study on threshold voltage control of MFSFET utilizing ferroelectric nondoped HfO2 thin films
Masakazu Tanuma, Joong-Won Shin, Shun-ichiro Ohmi (Tokyo Tech) SDM2022-63
Ferroelectric HfO2 thin films are able to be formed on Si substrate, which is difficult for conventional materials due t... [more] SDM2022-63
pp.38-42
ICD, SDM, ITE-IST [detail] 2022-08-08
14:15
Online   Evaluation of Steep Subthreshold Slope Device "Dual-gate type PN-body Tied SOI-FET" for Ultra-low Voltage Operation
Haruki Yonezaki, Jiro Ida, Takayuki Mori (KIT), Koichiro Ishibashi (UEC) SDM2022-38 ICD2022-6
In this study, we report the first prototype results of a Steep SS "Dual-Gate (DG) PN-Body Tied (PNBT) SOI-FET" for extr... [more] SDM2022-38 ICD2022-6
pp.17-20
ED 2022-04-21
11:00
Online Online TIQ Based Flash ADC with Threshold Compensation
Yuhei Hashimoto, Cong-Kha Pham (UEC) ED2022-5
It is known that Analog-to-digital converter using TIQ comparators are vulnerable to process and temperature variations,... [more] ED2022-5
pp.15-18
ICD, SDM, ITE-IST [detail] 2020-08-07
11:00
Online Online CMOS Inverter Transfer Characteristics on Steep SS “PN-Body Tied SOI-FET”
Shota Ishiguro, Jiro Ida, Takayuki Mori (KIT), Koichiro Ishibashi (UEC) SDM2020-8 ICD2020-8
In this study, we report the CMOS Inverter Transfer Characteristics on Steep SS “PN-Body Tied SOI-FET” proposed in our l... [more] SDM2020-8 ICD2020-8
pp.37-40
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2019-11-13
15:25
Ehime Ehime Prefecture Gender Equality Center Design of Reference-free CMOS Temperature Sensor with Statistical MOSFET Selection
Shogo Harada, Mahfuzul Islam, Takashi Hisakado, Osami Wada (Kyoto Univ.) VLD2019-34 DC2019-58
The need for low power temperature sensors that can operate under limited power supply has been increasing.
One of the... [more]
VLD2019-34 DC2019-58
pp.51-56
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2019-11-14
09:40
Ehime Ehime Prefecture Gender Equality Center Device characteristic measurement for realizing CMOS-compatible non-volatile memory using FiCC
Ippei Tanaka, Naoyuki Miyagawa, Tomoya Kimura, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) VLD2019-36 DC2019-60
This report proposes a new non-volatile memory element that can be fabricated with a standard CMOS process, and that can... [more] VLD2019-36 DC2019-60
pp.63-68
SDM, ICD, ITE-IST [detail] 2019-08-09
10:15
Hokkaido Hokkaido Univ., Graduate School /Faculty of Information Science and Fabrication and electrical characteristics of amorphous-ZnSnO/Si bilayer tunnel FETs
Kimihiko Kato (Univ. of Tokyo/AIST), Hiroaki Matsui, Hitoshi Tabata, Mitsuru Takenaka, Shinichi Takagi (Univ. of Tokyo) SDM2019-46 ICD2019-11
We have examined impact of an amorphous ZnSnO channel layer with high thickness uniformity on electrical characteristics... [more] SDM2019-46 ICD2019-11
pp.63-66
SDM 2019-01-29
09:55
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Assessment of Steep-Subthreshold Swing Behaviors in Ferroelectric Field-Effect Transistors
Shinji Migita, Hiroyuki Ota (AIST), Akira Thorium (U. Tokyo) SDM2018-82
Steep-subthreshold swing (steep-SS) behaviors are observable in recent ferroelectric-gate field-effect transistors (FE-F... [more] SDM2018-82
pp.5-8
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2018-12-07
09:00
Hiroshima Satellite Campus Hiroshima Design and fabrication of characteristics measurement circuit for CMOS-compatible ultra-low-power non-volatile memory element using FiCC
Ippei Tanaka, Naoyuki Miyagawa, Tomoya Kimura, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) VLD2018-65 DC2018-51
This report proposes a new non-volatile memory element that can be fabricated with a standard CMOS process, and that can... [more] VLD2018-65 DC2018-51
pp.183-188
SDM 2018-11-09
15:55
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Characteristics and Ultralow Voltage Rectification Experiment on MOS Diode connection using Super Steep SS PN-Body Tied SOI-FET
Shun Momose, Jiro Ida, Takuya Yamada, Takayuki Mori, Kenji Itoh (KIT), Koichiro Ishibashi (UEC), Yasuo Arai (KEK) SDM2018-76
In order to utilize the Radio Frequency (RF) signal power existing in the living environment, a RF rectifier that realiz... [more] SDM2018-76
pp.59-64
SDM 2018-10-18
14:00
Miyagi Niche, Tohoku Univ. Statistical Analysis of Electric Characteristics Variability Using MOSFETs with Asymmetric Source and Drain
Shinya Ichino, Akinobu Teramoto, Rihito Kuroda, Takezo Mawaki, Tomoyuki Suwa, Shigetoshi Sugawa (Tohoku Univ.) SDM2018-62
In this paper, a statistical analysis of electric characteristics variabilities such as threshold voltage variability an... [more] SDM2018-62
pp.51-56
SDM, ICD, ITE-IST [detail] 2018-08-07
14:25
Hokkaido Hokkaido Univ., Graduate School of IST M Bldg., M151 Experiment of Ultralow Voltage Rectification by Super Steep SS "PN-Body Tied SOI-FET"
Shun Momose, Jiro Ida, Takuya Yamada, Takayuki Mori, Kenji Itoh (KIT), Koichiro Ishibashi (UEC), Yasuo Arai (KEK) SDM2018-31 ICD2018-18
In order to construct a rectifier that function with µW power, it is necessary to develop a new diode technology. The co... [more] SDM2018-31 ICD2018-18
pp.31-34
SDM, ICD, ITE-IST [detail] 2018-08-07
15:00
Hokkaido Hokkaido Univ., Graduate School of IST M Bldg., M151 A 0.6V 9bit PWM Differential Arithmetic Circuit
Fumiya Kojima, Tomochika Harada (Yamagata Univ) SDM2018-32 ICD2018-19
In this paper, we design and evaluate the analog / PWM conversion circuit and the PWM differential arithmetic circuit wh... [more] SDM2018-32 ICD2018-19
pp.35-40
HWS, ISEC, SITE, ICSS, EMM, IPSJ-CSEC, IPSJ-SPT [detail] 2018-07-26
14:10
Hokkaido Sapporo Convention Center Compensation of Temperature Induced Flipping-Bits in CMOS SRAM PUF by NMOS Body-Bias
Xuanhao Zhang, Xiang Chen, Hanfeng Sun, Hirofumi Shinohara (Waseda Univ.) ISEC2018-41 SITE2018-33 HWS2018-38 ICSS2018-44 EMM2018-40
PUF suffers from flipping-bits caused by temperature changes which degrade the stability of output. This paper proposes ... [more] ISEC2018-41 SITE2018-33 HWS2018-38 ICSS2018-44 EMM2018-40
pp.333-336
VLD, HWS
(Joint)
2018-02-28
17:45
Okinawa Okinawa Seinen Kaikan Evaluation of Soft Error Tolerance on Flip-Flop depending on 65 nm FDSOI Transistor Threshold-Voltage
Mitsunori Ebara, Haruki Maruoka, Kodai Yamada, Jun Furuta, Kazutoshi Kobayashi (KIT) VLD2017-104
Moore's Law has been miniaturizing integrated circuits, which
can make a lot of high performance devices such as PCs an... [more]
VLD2017-104
pp.91-96
SDM, ICD, ITE-IST [detail] 2017-08-01
13:50
Hokkaido Hokkaido-Univ. Multimedia Education Bldg. Evaluation of equivalent MOSFET reduced temperature dependence of threshold voltage
Takuya Yamaguchi, Tatsuya Oku, Kawori Sekine (Meiji Univ.) SDM2017-41 ICD2017-29
A MOSFET has a temperature dependence of threshold voltage and mobility. In this paper, we focused on threshold voltage ... [more] SDM2017-41 ICD2017-29
pp.77-82
SDM, ICD, ITE-IST [detail] 2017-08-02
11:35
Hokkaido Hokkaido-Univ. Multimedia Education Bldg. Gate Controlled Diode Characteristics of Super Steep Subthreshold slope PN-Body Tied SOI-FET for high Efficiency RF Energy Harvesting
Shun Momose, Jiro Ida, Takayuki Mori, Takahiro Yoshida, Junpei Iwata, Takashi Horii, Takahiro Furuta, Takuya Yamada, Daichi Takamatsu, Kenji Itoh (KIT), Koichiro Ishibashi (UEC), Yasuo Arai (KEK) SDM2017-45 ICD2017-33
The gate controlled diode characteristics with our newly super steep subthreshold slope (SS) “PN-Bode Tied SOI FET” was ... [more] SDM2017-45 ICD2017-33
pp.109-114
VLD, DC, CPSY, RECONF, CPM, ICD, IE
(Joint) [detail]
2016-11-28
12:45
Osaka Ritsumeikan University, Osaka Ibaraki Campus 2-step Charge Pump Voltage Booster Circuit for Micro Energy Harvesting
Tomoya Kimura, Hiroyuki ochi (Ritsumeikan Univ.) VLD2016-46 DC2016-40
This report proposes L1L5-type 2-step charge pump circuit that is suitable for boosting efficiently the subthreshold inp... [more] VLD2016-46 DC2016-40
pp.13-18
 Results 1 - 20 of 94  /  [Next]  
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