Print edition: ISSN 0913-5685
Online edition: ISSN 2432-6380
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VLD2005-97
Optimization of Body Bias Voltage Set for Threshold Voltage Control in Flex Power FPGA
Takashi Kawanami, Masakazu Hioki, Yohei Matsumoto (AIST), Toshiyuki Tsutsumi (AIST/MEIJI), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST)
pp. 1 - 6
VLD2005-98
A Study of the Dynamically Reconfigurable Processor Vulcan
Toshihiko Hashinaga (Kyushu Univ.), Lovic Gauthier, Takayuki Kando, Victor Mauro Goulart Ferreira, Ryutaro Susukita (FLEETS), Tetsuo Hiraki, Yosuke Yamazaki, Takaaki Nagano, Kazuaki Murakami (Kyushu Univ.)
pp. 7 - 11
VLD2005-99
The direct execution mode on dynamically reconfigurable processors
Hideharu Amano, Yohei Hasegawa, Shohei Abe (Keio Univ.)
pp. 13 - 18
VLD2005-100
A Study on Resource Sharing Technique for Multi-Context Logic Device
Hiroshi Shinohara, Masaki Kobata, Shigeki Imai, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 19 - 24
VLD2005-101
The Proposal and Verification of FPGA Remote-Reconfiguration
Hiroshi Tanno, Hiroshi Tsubokawa (Tokyo University of Technology)
pp. 25 - 30
VLD2005-102
Implementation and Evaluation of Remote Logic Analyzer
Go Saitou, Kazuo Nagata, Hideo Harada, Hidetomo Shibamura, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 31 - 36
VLD2005-103
Retargeting GCC and GNU Toolchain for Extended Instruction Set
Yuji Nagamatsu, Nagisa Ishiura (Kwansei Gakuin Univ.), Nobuyuki Hikichi (SRA-KTL)
pp. 37 - 41
VLD2005-104
A Parallel Volume Rendering System implemented with High-Speed DVI Link
Dai Okamura, Yusuke Noda, Shinobu Miwa, Hajime Shimada (Kyoto Univ), Yasuhiko Nakashima (Kyoto Univ/JST), Shin-ichiro Mori, Shinji Tomita (Kyoto Univ)
pp. 43 - 46
VLD2005-105
A Stochastic Biochemical Simulator with a Data-transfer Network on an FPGA
Masato Yoshimi, Yasunori Osana, Yow Iwaoka, Yuri Nishikawa, Toshinori Kojima (Keio Univ.), Akira Funahashi, Noriko Hiroi (JST), Yuichiro Shibata, Naoki Iwanaga (Nagasaki Univ.), Hiroaki Kitano (JST), Hideharu Amano (Keio Univ.)
pp. 47 - 52
VLD2005-106
A Performance Improvement Strategy for Numerical Integration on an FPGA-Based Biochemical Simulator ReCSiP
Yuri Nishikawa, Yasunori Osana, Masato Yoshimi, Yow Iwaoka, Toshinori Kojima (Keio Univ.), Akira Funahashi, Noriko Hiroi (JST), Yuichiro Shibata, Naoki Iwanaga (Nagasaki Univ.), Hiroaki Kitano (JST), Hideharu Amano (Keio Univ.)
pp. 53 - 58
VLD2005-107
Hardware-resource Utilization Analysis on an FPGA-Based Biochemical Simulator ReCSiP
Yasunori Osana (Keio Univ.), Naoki Iwanaga (Nagasaki Univ.), Masato Yoshimi, Yow Iwaoka, Toshinori Kojima, Yuri Nishikawa (Keio Univ.), Akira Funahashi (JST), Noriko Hiroi (Keio Univ.), Yuichiro Shibata, Hiroaki Kitano (Nagasaki Univ.), Hideharu Amano (Keio Univ.)
pp. 59 - 64