IEICE Technical Report

Print edition: ISSN 0913-5685
Online edition: ISSN 2432-6380

vol. 105, no. 517

Reconfigurable Systems

Workshop Date : 2006-01-17 / Issue Date : 2006-01-10

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RECONF2005-77
Implimentation of high speed audiofingerprint system using FPGAs
Hisashi Isonaga, Yasushi Inoguchi (JAIST)
pp. 1 - 6

RECONF2005-78
Voice Recognition LSI based on FTTSS
Tomotaka Nakano, Park Hu Gang, Tetsuo Funada, Akio Kitagawa (Kanazawa Univ)
pp. 7 - 12

RECONF2005-79
An LSI design to support Sound Finite Difference Time Domain Method
Daichi Ito, Ryotaro Kobayashi, Toshio Shimada (Nagoya Univ.)
pp. 13 - 18

RECONF2005-80
Accelaration of Hydrosynamical Simulations using a FPGA board
Naohito Nakasato, Tsuyoshi Hamada (RIKEN)
pp. 19 - 24

RECONF2005-81
Programmable Numerical Function Generators Based on Quadratic Approximation: Architecture and Synthesis Method
Shinobu Nagayama (Hiroshima City Univ.), Tsutomu Sasao (K.I..T.), Jon T. Butler (Naval Postgraduate School)
pp. 25 - 30

RECONF2005-82
Implementation of Stream Application on Programmable Devices by C Level Design
Naohiro Katsura, Yohei Hasegawa, Vu Manh Tuan, Takamasa Kanamori, Hideharu Amano (Keio Univ.)
pp. 31 - 36

RECONF2005-83
Multuiple Programming Method and Circuit Design for a Phase Change Nonvolatile Random Access Memory
Takatomi Izumi, Masashi Takata, Kazuya Nakayama, Akio Kitagawa (Kanazawa Univ.)
pp. 37 - 42

RECONF2005-84
Modification of monotonic route to reduce max density for single layer BGA package
Yoshitaka Nomura, Atsushi Takahashi (Tokyo Tech)
pp. 43 - 48

RECONF2005-85
Boolean Equivalence Checking Using a Subset of First-Order Logic
Atsushi Moritomo, Kiyoharu Hamaguchi, Toshinobu Kashiwabara (Osaka Univ.)
pp. 49 - 54


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan