IEICE Technical Report

Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380

Dependable Computing

Workshop Date : 2013-04-26 / Issue Date : 2013-04-19

DC2013-1
An Approach to Highly Reliable Scheme for a Digital Power Control
Kenta Imai, Aromhack Saysanasongkham, Masayuki Arai, Satoshi Fukumoto, Keiji Wada (Tokyo Metropolitan Univ.)
pp. 1 - 6

DC2013-2
Stateful NMR based RAID1
Minoru Uehara (Toyo Univ.)
pp. 7 - 12

DC2013-3
Construction of Real-time Video Stabilizing System on an FPGA
Hiroshi Maruyama, Toru Yabuki, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba)
pp. 13 - 18

DC2013-4
Proposal of Source-code Generator named Simple Logic Compiler for Low Power Accelerator CMA
Nobuaki Ozaki, Hideharu Amano (Keio Univ.)
pp. 19 - 24

DC2013-5
[Invited Talk] Practical Case Study of Smart Grid and Smart Community
Hiroaki Nishi (Keio Univ.)
pp. 25 - 29

DC2013-6
Aumenting a Test Suite for Parameter Value Weighting
Satoshi Fujimoto, Hideharu Kojima, Tatsuhiro Tsuchiya (Osaka Univ.)
pp. 31 - 36

DC2013-7
A study for implementing a 3D fluid simulation on an FPGA
Kenta Fujinami, Akira Sugiura, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba)
pp. 37 - 42

DC2013-8
On-Chip Delay Measurement Using Adjacent Test Architecture
Kentaroh Katoh (TNCT)
pp. 43 - 48

DC2013-9
A low latency topology for NoC using multiple host links
Ryuta Kawano (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII)
pp. 49 - 54

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan