IEICE Technical Report

Online edition: ISSN 2432-6380

Computer Systems

Workshop Date : 2023-12-05 - 2023-12-06 / Issue Date : 2023-11-28

CPSY2023-27
Performance improvements of Multi-Platform Parallel Computing System Based on Web Technologies
Soki Imaizumi, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.)
pp. 1 - 6

CPSY2023-28
A Performance Evaluation of Job Switching for Interactive High-Performance Computing
Koki Kusunoki, Jun Kato, Masahiro Miwa (Fujitsu)
pp. 7 - 12

CPSY2023-29
Design of Resettable and Non-Destructive Readable TFF for Half-Flux-Quantum Circuits
Yuki Matsumoto (Kyushu Univ.), Toranosuke Nakayama, Shoma Tanemura, Masamitsu Tanaka (Nagoya Univ.), Takatsugu Ono (Kyushu Univ.)
pp. 13 - 18

CPSY2023-30
Implementation of a mixed cluster system using Android OS and Linux OS
Yusaku Terashima, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.)
pp. 19 - 24

CPSY2023-31
Evaluation of conversion overheads for the sparse matrix format appliying indices of the non-zero elements dictionary compression to accelerate SpMV on GPU
Shun Murakami (JAIST), Kazunori Yoneda, Iwamura Takashi, Masahiro Watanabe (Fujitsu Japan), Yasushi Inoguchi (JAIST)
pp. 25 - 30

CPSY2023-32
Development of Genetic Algorithm for Grid Graph in Order/Degree Problem
Kimura Hiroto, Yoshiko Hanada (Kansai Univ.), Masahiro Nakao, Keiji Yamamoto (R-CCS)
pp. 31 - 35

CPSY2023-33
(See Japanese page.)
pp. 36 - 41

CPSY2023-34
(See Japanese page.)
pp. 42 - 47

CPSY2023-35
An FPGA-Based Accelerator for Graph Embedding using Sequential Training Algorithm
Kazuki Sunaga, Keisuke Sugiura, Hiroki Matsutani (Keio Univ.)
pp. 48 - 53

CPSY2023-36
Prototype development and preliminary evaluation of a multi-level pipeline CGRA
Tomoya Akabe, Yasuhiko Nakashima (NAIST)
pp. 54 - 57

CPSY2023-37
An Efficient Sparse Matrix Storage Format for Sparse Matrix-Vector Multiplication and Sparse Matrix-Transpose-Vector Multiplication on GPUs
Ryohei Izawa, Yasushi Inoguchi (JAIST)
pp. 58 - 63

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan