| Paper Abstract and Keywords |
| Presentation |
2005-05-12 17:15
Code Scheduling in Consideration of Place and Wire in Back End Compiler for PARS
Ryuji Hada, Takeshi Takeuchi, Takeshi Fukuda, Kazuya Tanigawa, Tetsuo Hironaka (HCU) |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
We have proposed a reconfigurable PARS architecture for general-purpose,and developing the PARS Compiler.We are developing the PARS Back-End Compiler(P-BEC I) which extracts parallelism from input code and outputs the assembly code with place and route information for PARS architecture.
The place and route process in the P-BEC I is not enough to utilize hardware resources of PARS architecture.To solve this issue,in this paper,we propose a new scheduling method to help to utilize the hardware resources in the place and route process. This proposal scheduling method realizes to map the extracted parallelism to hardware resources efficiently, and prevent loss of the parallelism in place and route. In the evaluation, we compared the method with P-BEC I on the number of executioncycles.From the result, the speed up was 2.46 times higher in program with high parallelism, and 1.04 times higher in program with low parallelism. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
reconfigurable architecture / compiler / P-BEC / place and route / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 105, no. 42, RECONF2005-13, pp. 73-78, May 2005. |
| Paper # |
RECONF2005-13 |
| Date of Issue |
2005-05-05 (RECONF) |
| ISSN |
Print edition: ISSN 0913-5685 |
| Download PDF |
|
| Conference Information |
| Committee |
RECONF |
| Conference Date |
2005-05-12 - 2005-05-13 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Kyoto University |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Reconfigurable System, etc |
| Paper Information |
| Registration To |
RECONF |
| Conference Code |
2005-05-RECONF |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
Code Scheduling in Consideration of Place and Wire in Back End Compiler for PARS |
| Sub Title (in English) |
|
| Keyword(1) |
reconfigurable architecture |
| Keyword(2) |
compiler |
| Keyword(3) |
P-BEC |
| Keyword(4) |
place and route |
| Keyword(5) |
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| Keyword(6) |
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| Keyword(7) |
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| 1st Author's Name |
Ryuji Hada |
| 1st Author's Affiliation |
Hiroshima City University (HCU) |
| 2nd Author's Name |
Takeshi Takeuchi |
| 2nd Author's Affiliation |
Hiroshima City University (HCU) |
| 3rd Author's Name |
Takeshi Fukuda |
| 3rd Author's Affiliation |
Hiroshima City University (HCU) |
| 4th Author's Name |
Kazuya Tanigawa |
| 4th Author's Affiliation |
Hiroshima City University (HCU) |
| 5th Author's Name |
Tetsuo Hironaka |
| 5th Author's Affiliation |
Hiroshima City University (HCU) |
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| Speaker |
Author-1 |
| Date Time |
2005-05-12 17:15:00 |
| Presentation Time |
30 minutes |
| Registration for |
RECONF |
| Paper # |
RECONF2005-13 |
| Volume (vol) |
vol.105 |
| Number (no) |
no.42 |
| Page |
pp.73-78 |
| #Pages |
6 |
| Date of Issue |
2005-05-05 (RECONF) |
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