| Paper Abstract and Keywords |
| Presentation |
2006-05-11 15:00
A Software-level Energy Reduction Technique for Embedded Microprocessor Exploiting Narrow Bitwidth Operations
Seiichiro Yamaguchi, Masanori Muroyama, Tohru Ishihara, Hiroto Yasuura (Kyushu Univ.) |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
This paper proposes a software-level energy reduction technique for microprocessor-based embedded systems. A basic idea is to reduce switching activities in sign extension bits of instruction operands through shifting the operands. Our technique consists of following three steps: 1) shift operands from LSB side toward MSB side by optimal shift amount, 2) execute instructions with the shifted operands, and 3) shift back computational results to original positions. Experimental results show about 3.7% energy reduction of datapath, and about 1.5% energy reduction of overall microprocessor. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
low energy / microprocessor / embedded system / bitwidth / compiler optimization technique / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 106, no. 31, VLD2006-3, pp. 13-18, May 2006. |
| Paper # |
VLD2006-3 |
| Date of Issue |
2006-05-04 (VLD) |
| ISSN |
Print edition: ISSN 0913-5685 |
| Download PDF |
|
| Conference Information |
| Committee |
VLD IPSJ-SLDM |
| Conference Date |
2006-05-11 - 2006-05-12 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Ehime University |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
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| Paper Information |
| Registration To |
VLD |
| Conference Code |
2006-05-VLD-IPSJ-SLDM |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
A Software-level Energy Reduction Technique for Embedded Microprocessor Exploiting Narrow Bitwidth Operations |
| Sub Title (in English) |
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| Keyword(1) |
low energy |
| Keyword(2) |
microprocessor |
| Keyword(3) |
embedded system |
| Keyword(4) |
bitwidth |
| Keyword(5) |
compiler optimization technique |
| Keyword(6) |
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| Keyword(7) |
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| 1st Author's Name |
Seiichiro Yamaguchi |
| 1st Author's Affiliation |
Kyushu University (Kyushu Univ.) |
| 2nd Author's Name |
Masanori Muroyama |
| 2nd Author's Affiliation |
Kyushu University (Kyushu Univ.) |
| 3rd Author's Name |
Tohru Ishihara |
| 3rd Author's Affiliation |
Kyushu University (Kyushu Univ.) |
| 4th Author's Name |
Hiroto Yasuura |
| 4th Author's Affiliation |
Kyushu University (Kyushu Univ.) |
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| Speaker |
Author-1 |
| Date Time |
2006-05-11 15:00:00 |
| Presentation Time |
30 minutes |
| Registration for |
VLD |
| Paper # |
VLD2006-3 |
| Volume (vol) |
vol.106 |
| Number (no) |
no.31 |
| Page |
pp.13-18 |
| #Pages |
6 |
| Date of Issue |
2006-05-04 (VLD) |