| Conference Information |
| Committee |
SDM |
| Conference Date |
2006-06-21 - 2006-06-22 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Faculty Club, Hiroshima Univ. |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Science and Technologies of Dielectric Thin Films for Future Electron Devices |
| Paper Information |
| Registration To |
SDM |
| Conference Code |
2006-06-SDM |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
Work-function engineering of poly-Si gate by Fermi level pinning and its impact on low power CMOSFET |
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| 1st Author's Name |
Yasuhiro Shimamoto |
| 1st Author's Affiliation |
Central Research Laboratory, Hitachi Ltd. (Hitachi) |
| 2nd Author's Name |
Jiro Yugami |
| 2nd Author's Affiliation |
Renesas Technology Corp. (Renesas) |
| 3rd Author's Name |
Masao Inoue |
| 3rd Author's Affiliation |
Renesas Technology Corp. (Renesas) |
| 4th Author's Name |
Masaharu Mizutani |
| 4th Author's Affiliation |
Renesas Technology Corp. (Renesas) |
| 5th Author's Name |
Takashi Hayashi |
| 5th Author's Affiliation |
Renesas Technology Corp. (Renesas) |
| 6th Author's Name |
Masahiro Yoneda |
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Renesas Technology Corp. (Renesas) |
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| Speaker |
Author-1 |
| Date Time |
2006-06-21 15:20:00 |
| Presentation Time |
25 minutes |
| Registration for |
SDM |
| Paper # |
SDM2006-47 |
| Volume (vol) |
vol.106 |
| Number (no) |
no.108 |
| Page |
pp.31-35 |
| #Pages |
5 |
| Date of Issue |
2006-06-14 (SDM) |