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Paper Abstract and Keywords
Presentation 2006-07-27 11:00
1 A 1V 30mW 10b 100MSample/s Pipeline A/D Converter Using Capacitance Coupling Techniques
Kazutaka Honda, Masanori Furuta, Shoji Kawahito (Shizuoka Univ.) Link to ES Tech. Rep. Archives: ICD2006-62
Abstract (in Japanese) (See Japanese page) 
(in English) This paper describes a low power low distortion pipeline ADC with 1.0V
supply voltage. A 10b 100MSample/s A/D converter using capacitance
coupling class-AB amplifier consumes only 30mW in a 90nm digital CMOS
technology. The capacitance coupling S/H stage suppresses the
distortion caused by the insufficient gate-source voltage of sampling
switches due to a low supply voltage. The SNDR and the SFDR at 100MHz
sampling are 53.8 dB and 71.2 dB, respectively.
Keyword (in Japanese) (See Japanese page) 
(in English) A/D converter / pipeline / low supply voltage / low distortion / capacitance coupling / low power / /  
Reference Info. IEICE Tech. Rep., vol. 106, pp. 11-16, July 2006.
Paper #  
Date of Issue 2006-07-20 (ICD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF Link to ES Tech. Rep. Archives: ICD2006-62

Conference Information
Committee ICD ITE-IST  
Conference Date 2006-07-27 - 2006-07-28 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ITE-IST 
Conference Code 2006-07-ICD-ITE-IST 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) 1 A 1V 30mW 10b 100MSample/s Pipeline A/D Converter Using Capacitance Coupling Techniques 
Sub Title (in English)  
Keyword(1) A/D converter  
Keyword(2) pipeline  
Keyword(3) low supply voltage  
Keyword(4) low distortion  
Keyword(5) capacitance coupling  
Keyword(6) low power  
1st Author's Name Kazutaka Honda  
1st Author's Affiliation Shizuoka University (Shizuoka Univ.)
2nd Author's Name Masanori Furuta  
2nd Author's Affiliation Shizuoka University (Shizuoka Univ.)
3rd Author's Name Shoji Kawahito  
3rd Author's Affiliation Shizuoka University (Shizuoka Univ.)
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Speaker Author-1 
Date Time 2006-07-27 11:00:00 
Presentation Time 30 minutes 
Registration for ITE-IST 
Paper # ICD2006-62 
Volume (vol) vol.106 
Number (no) no.189 
Page pp.11-16 
Date of Issue 2006-07-20 (ICD) 

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