| Paper Abstract and Keywords |
| Presentation |
2007-01-17 10:10
Vdd Gate Biasing RF CMOS Amplifier Design Technique Based on the Effect of Carrier Velocity Saturation
Noboru Ishihara (Gunma Univ.) |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
One of the interesting MOSFET characteristics is the effect of carrier velocity saturation (CVS) on the drain current. In the CVS region, the transconductance becomes constant independent both of the gate and the drain voltage. In this paper, RF CMOS amplifier design technique using the CVS region has been proposed. By setting the FET gate bias to the power supply voltage (Vdd), stable operation against Vdd variations can be achieved with a simple circuit configuration. By using this, a 5 GHz amplifier has been designed and fabricated by using 0.18-m CMOS process technology. The chip has been operated with a gain variation less than 1 dB having a peak gain of 13.5 dB when Vdd has been varied from 1.2 to 2.9 V. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
RF-CMOS / Amplifiers / Gate bias circuits / Carrier velocity saturation / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 106, no. 460, MW2006-154, pp. 7-12, Jan. 2007. |
| Paper # |
MW2006-154 |
| Date of Issue |
2007-01-10 (ED, MW) |
| ISSN |
Print edition: ISSN 0913-5685 |
| Download PDF |
|
| Conference Information |
| Committee |
MW ED |
| Conference Date |
2007-01-17 - 2007-01-19 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
|
| Paper Information |
| Registration To |
MW |
| Conference Code |
2007-01-MW-ED |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
Vdd Gate Biasing RF CMOS Amplifier Design Technique Based on the Effect of Carrier Velocity Saturation |
| Sub Title (in English) |
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| Keyword(1) |
RF-CMOS |
| Keyword(2) |
Amplifiers |
| Keyword(3) |
Gate bias circuits |
| Keyword(4) |
Carrier velocity saturation |
| Keyword(5) |
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| Keyword(6) |
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| Keyword(7) |
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| 1st Author's Name |
Noboru Ishihara |
| 1st Author's Affiliation |
Gunma University (Gunma Univ.) |
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| Speaker |
Author-1 |
| Date Time |
2007-01-17 10:10:00 |
| Presentation Time |
25 minutes |
| Registration for |
MW |
| Paper # |
ED2006-201, MW2006-154 |
| Volume (vol) |
vol.106 |
| Number (no) |
no.459(ED), no.460(MW) |
| Page |
pp.7-12 |
| #Pages |
6 |
| Date of Issue |
2007-01-10 (ED, MW) |