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| Presentation | 2007-03-09 14:20 A behavioral power modeling algorithm which considers area speed tradeoff Noriyuki Inoue, Masaaki Ohtsuki, Masahiro Fukui (Ritsumeikan Uni.) Link to ES Tech. Rep. Archives:  ICD2006-242 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Due to the rapid growth of the size of systems, it has become a very important task to plan the design strategy based on the power estimation in the early design stage. Power analysis in higher abstraction level is required. Based on a control data flow graph, the authors have developed a structured tradeoff model of power and speed of a given function and a method to obtain the model. This paper gives a fundamental evaluation through a prototype system and discusses its usefulness and future works. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | high-level synthesis / high-level estimation / power estimation / tradeoff analysis / area-speed / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 106, no. 549, VLD2006-151, pp. 63-68, March 2007. | |
| Paper # | VLD2006-151 | |
| Date of Issue | 2007-03-02 (VLD, ICD) | |
| ISSN | Print edition: ISSN 0913-5685 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | Link to ES Tech. Rep. Archives: ICD2006-242 |
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| Conference Information | |
| Committee | ICD VLD |
| Conference Date | 2007-03-07 - 2007-03-09 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Mielparque Okinawa |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | System-on-silicon design techniques and related VLSs |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2007-03-ICD-VLD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A behavioral power modeling algorithm which considers area speed tradeoff |
| Sub Title (in English) | |
| Keyword(1) | high-level synthesis |
| Keyword(2) | high-level estimation |
| Keyword(3) | power estimation |
| Keyword(4) | tradeoff analysis |
| Keyword(5) | area-speed |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Noriyuki Inoue |
| 1st Author's Affiliation | Ritsumeikan University (Ritsumeikan Uni.) |
| 2nd Author's Name | Masaaki Ohtsuki |
| 2nd Author's Affiliation | Ritsumeikan University (Ritsumeikan Uni.) |
| 3rd Author's Name | Masahiro Fukui |
| 3rd Author's Affiliation | Ritsumeikan University (Ritsumeikan Uni.) |
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| Speaker | Author-2 |
| Date Time | 2007-03-09 14:20:00 |
| Presentation Time | 20 minutes |
| Registration for | VLD |
| Paper # | VLD2006-151, ICD2006-242 |
| Volume (vol) | vol.106 |
| Number (no) | no.549(VLD), no.552(ICD) |
| Page | pp.63-68 |
| #Pages | 6 |
| Date of Issue | 2007-03-02 (VLD, ICD) |
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