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Paper Abstract and Keywords
Presentation 2007-04-27 16:20
Linear Time-invariant Analysis of CMOS Output Buffer with LECCS Model Using Time-variant Resistors
Atsushi Koyama, Takashi Hisakado, Osami Wada (Kyoto Univ.) EMCJ2007-8
Abstract (in Japanese) (See Japanese page) 
(in English) A new modeling method for fast time-domain simulation
of power-supply noise of a CMOS output buffer is proposed.
Transistor switches are modeled as linear time-variant resistors,
and a linear time-variant model is obtained.
Under the condition that the transient duration of the transistors is short enough compared to the time-constants of power and ground bounces, the model can be analyzed only by linear time-invariant simulations,
so that fast simulation becomes possible.
Keyword (in Japanese) (See Japanese page) 
(in English) EMC / CMOS / time-variant circuit / transition matrix / linear simulation / / /  
Reference Info. IEICE Tech. Rep., vol. 107, no. 25, EMCJ2007-8, pp. 43-48, April 2007.
Paper # EMCJ2007-8 
Date of Issue 2007-04-20 (EMCJ) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF EMCJ2007-8

Conference Information
Committee EMCJ  
Conference Date 2007-04-27 - 2007-04-27 
Place (in Japanese) (See Japanese page) 
Place (in English) NICT 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To EMCJ 
Conference Code 2007-04-EMCJ 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Linear Time-invariant Analysis of CMOS Output Buffer with LECCS Model Using Time-variant Resistors 
Sub Title (in English)  
Keyword(1) EMC  
Keyword(2) CMOS  
Keyword(3) time-variant circuit  
Keyword(4) transition matrix  
Keyword(5) linear simulation  
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Keyword(8)  
1st Author's Name Atsushi Koyama  
1st Author's Affiliation Kyoto University (Kyoto Univ.)
2nd Author's Name Takashi Hisakado  
2nd Author's Affiliation Kyoto University (Kyoto Univ.)
3rd Author's Name Osami Wada  
3rd Author's Affiliation Kyoto University (Kyoto Univ.)
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Speaker Author-1 
Date Time 2007-04-27 16:20:00 
Presentation Time 25 minutes 
Registration for EMCJ 
Paper # EMCJ2007-8 
Volume (vol) vol.107 
Number (no) no.25 
Page pp.43-48 
#Pages 6 
Date of Issue 2007-04-20 (EMCJ) 

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