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| Presentation | 2007-09-07 14:40 Design Method for Synchronous Rectification Circuit using Saturable Current Transformer Katsuhiko Nishimura (FJAC), Michihiko Nagao (Sojo Univ.), Kazuo Kobayashi (Shibaura Tech.), Koosuke Harada (Sojo Univ.)  EE2007-31 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | We previously explained and analyzed the operations of the passive unidirectional synchronous rectification SRS that uses a saturable current transformer SCT for the driving in the synchronous rectification circuits of a DC-DC converter. Moreover, we clarified the effectiveness of each parameter in the circuit operation and we argued the design value of them. In this paper, we verify them by the experiment from these analysis and argue about design method. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | DC-DC converter / synchronous rectification method / saturable current transformer / circuit parameter / design method / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 107, no. 211, EE2007-31, pp. 19-24, Sept. 2007. | |
| Paper # | EE2007-31 | |
| Date of Issue | 2007-08-31 (EE) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | EE2007-31 |
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| Conference Information | |
| Committee | EE |
| Conference Date | 2007-09-07 - 2007-09-07 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | EE |
| Conference Code | 2007-09-EE |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design Method for Synchronous Rectification Circuit using Saturable Current Transformer |
| Sub Title (in English) | |
| Keyword(1) | DC-DC converter |
| Keyword(2) | synchronous rectification method |
| Keyword(3) | saturable current transformer |
| Keyword(4) | circuit parameter |
| Keyword(5) | design method |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Katsuhiko Nishimura |
| 1st Author's Affiliation | Fujitsu Access Limited (FJAC) |
| 2nd Author's Name | Michihiko Nagao |
| 2nd Author's Affiliation | Sojo University (Sojo Univ.) |
| 3rd Author's Name | Kazuo Kobayashi |
| 3rd Author's Affiliation | Shibaura Institute of Technology (Shibaura Tech.) |
| 4th Author's Name | Koosuke Harada |
| 4th Author's Affiliation | Sojo University (Sojo Univ.) |
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| Speaker | Author-1 |
| Date Time | 2007-09-07 14:40:00 |
| Presentation Time | 30 minutes |
| Registration for | EE |
| Paper # | EE2007-31 |
| Volume (vol) | vol.107 |
| Number (no) | no.211 |
| Page | pp.19-24 |
| #Pages | 6 |
| Date of Issue | 2007-08-31 (EE) |
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