| Paper Abstract and Keywords |
| Presentation |
2007-12-14 10:30
Component Labeling for k-Concave Binary Images Using an FPGA Yasuaki Ito, Koji Nakano (Hiroshima Univ.) COMP2007-48 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
Connected component labeling is a task that assigns unique IDs to the connected components
of a binary (black and white) image.
The main contribution of this paper is to present a hardware connected component labeling
algorithm for $k$-concave binary images designed to implement an FPGA.
Pixels of a binary image are given to the FPGA in raster order,
and the resulting labels are also output in the same order.
The advantage of our labeling algorithm is small latency and to use a small internal storage.
We have implemented our hardware labeling algorithm in an Altera Stratix Family FPGA,
and evaluated the performance.
The implementation result shows that for a $10$-concave binary image of $2048 \times 2048$,
our connected component labeling algorithm runs in approximately 750ms and its latency is approximately 70ns. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
Connected component / Labeling / Image processing / Hardware algorithm / FPGA / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 107, no. 390, COMP2007-48, pp. 1-8, Dec. 2007. |
| Paper # |
COMP2007-48 |
| Date of Issue |
2007-12-07 (COMP) |
| ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
COMP2007-48 |
| Conference Information |
| Committee |
COMP |
| Conference Date |
2007-12-14 - 2007-12-14 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Hiroshima University |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
|
| Paper Information |
| Registration To |
COMP |
| Conference Code |
2007-12-COMP |
| Language |
English (Japanese title is available) |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
Component Labeling for k-Concave Binary Images Using an FPGA |
| Sub Title (in English) |
|
| Keyword(1) |
Connected component |
| Keyword(2) |
Labeling |
| Keyword(3) |
Image processing |
| Keyword(4) |
Hardware algorithm |
| Keyword(5) |
FPGA |
| Keyword(6) |
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| Keyword(7) |
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| Keyword(8) |
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| 1st Author's Name |
Yasuaki Ito |
| 1st Author's Affiliation |
Hiroshima University (Hiroshima Univ.) |
| 2nd Author's Name |
Koji Nakano |
| 2nd Author's Affiliation |
Hiroshima University (Hiroshima Univ.) |
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| Speaker |
Author-1 |
| Date Time |
2007-12-14 10:30:00 |
| Presentation Time |
35 minutes |
| Registration for |
COMP |
| Paper # |
COMP2007-48 |
| Volume (vol) |
vol.107 |
| Number (no) |
no.390 |
| Page |
pp.1-8 |
| #Pages |
8 |
| Date of Issue |
2007-12-07 (COMP) |