| Paper Abstract and Keywords |
| Presentation |
2007-12-19 14:35
A Scheduling of Shuffled BP Decoding Considering Pipelining Delay Kazuya Yokohari, Yoshihiro Sugaya, Hirotomo Aso (Tohoku Univ.) CPSY2007-44 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
Shuffled BP decoding is known as a decoding method which has good decoding performance for low-density parity-check (LDPC) code. When Shuffled BP decoding is pipelined, some delays are required by processing time at a row process and a column process. In this paper, we propose a scheduling of Shuffled BP decoding considering pipelining delay and a construction method of parity check matrix which does not lead to a latency. Simulation results show that decoding performance of LDPC code constructed by the proposed method of parity check matrix has similar property of bit error ratio of LDPC code constructed by Array Code. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
Low-Density Parity-Check (LDPC) Code / Sum-Product Decoding / Shuffled BP Decoding / Array LDPC Code / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 107, no. 398, CPSY2007-44, pp. 21-26, Dec. 2007. |
| Paper # |
CPSY2007-44 |
| Date of Issue |
2007-12-12 (CPSY) |
| ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
CPSY2007-44 |
| Conference Information |
| Committee |
CPSY |
| Conference Date |
2007-12-19 - 2007-12-19 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Campus Plaza Kyoto |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Interconnect technology, etc |
| Paper Information |
| Registration To |
CPSY |
| Conference Code |
2007-12-CPSY |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
A Scheduling of Shuffled BP Decoding Considering Pipelining Delay |
| Sub Title (in English) |
|
| Keyword(1) |
Low-Density Parity-Check (LDPC) Code |
| Keyword(2) |
Sum-Product Decoding |
| Keyword(3) |
Shuffled BP Decoding |
| Keyword(4) |
Array LDPC Code |
| Keyword(5) |
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| Keyword(6) |
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| Keyword(8) |
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| 1st Author's Name |
Kazuya Yokohari |
| 1st Author's Affiliation |
Tohoku University (Tohoku Univ.) |
| 2nd Author's Name |
Yoshihiro Sugaya |
| 2nd Author's Affiliation |
Tohoku University (Tohoku Univ.) |
| 3rd Author's Name |
Hirotomo Aso |
| 3rd Author's Affiliation |
Tohoku University (Tohoku Univ.) |
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| Speaker |
Author-1 |
| Date Time |
2007-12-19 14:35:00 |
| Presentation Time |
30 minutes |
| Registration for |
CPSY |
| Paper # |
CPSY2007-44 |
| Volume (vol) |
vol.107 |
| Number (no) |
no.398 |
| Page |
pp.21-26 |
| #Pages |
6 |
| Date of Issue |
2007-12-12 (CPSY) |