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Paper Abstract and Keywords
Presentation 2008-01-17 16:25
A Hybrid Design Space Exploration Approach for a Coarse-Grained Reconfigurable Accelerator
Farhad Mehdipour (Kyushu Univ.), Hamid Noori (ISIT), Hiroaki Honda, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) VLD2007-133 CPSY2007-76 RECONF2007-79
Abstract (in Japanese) (See Japanese page) 
(in English) Multitude parameters involved in the design process of a reconfigurable accelerator which is exploited in embedded systems brings about a remarkable complexity and large design space. One effective technique is design space exploration which is capable to find a right balance between the different design parameters. Quantitative design approach is an alternative which uses the data collected from applications; however it is time consuming and highly depends on designer observations and analyses and might not conclude to an optimal design. In this paper, a hybrid approach is introduced which uses an analytical approach to explore the design space for a reconfigurable accelerator and determine a wise design point based on the quantitative data collected from the targeted applications. It also provides flexibility for applying new design constraints as well as new applications characteristics. Furthermore, this approach is a methodological approach which reduces the design time and results in a design which satisfies the design goals. Experimental results show the efficacy of the hybrid approach.
Keyword (in Japanese) (See Japanese page) 
(in English) Design Space Exploration / Extensible Processor / Data Flow Graph / Coarse Grain Accelerator / / / /  
Reference Info. IEICE Tech. Rep., vol. 107, no. 419, RECONF2007-79, pp. 89-94, Jan. 2008.
Paper # RECONF2007-79 
Date of Issue 2008-01-10 (VLD, CPSY, RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2007-133 CPSY2007-76 RECONF2007-79

Conference Information
Committee RECONF CPSY VLD IPSJ-SLDM  
Conference Date 2008-01-16 - 2008-01-17 
Place (in Japanese) (See Japanese page) 
Place (in English) Hiyoshi Campus, Keio University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) FPGA Applications, etc 
Paper Information
Registration To RECONF 
Conference Code 2008-01-RECONF-CPSY-VLD-IPSJ-SLDM 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Hybrid Design Space Exploration Approach for a Coarse-Grained Reconfigurable Accelerator 
Sub Title (in English)  
Keyword(1) Design Space Exploration  
Keyword(2) Extensible Processor  
Keyword(3) Data Flow Graph  
Keyword(4) Coarse Grain Accelerator  
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1st Author's Name Farhad Mehdipour  
1st Author's Affiliation Kyushu University (Kyushu Univ.)
2nd Author's Name Hamid Noori  
2nd Author's Affiliation Institute of Systems & Information Technologies/KYUSHU (ISIT)
3rd Author's Name Hiroaki Honda  
3rd Author's Affiliation Kyushu University (Kyushu Univ.)
4th Author's Name Koji Inoue  
4th Author's Affiliation Kyushu University (Kyushu Univ.)
5th Author's Name Kazuaki Murakami  
5th Author's Affiliation Kyushu University (Kyushu Univ.)
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Speaker Author-1 
Date Time 2008-01-17 16:25:00 
Presentation Time 25 minutes 
Registration for RECONF 
Paper # VLD2007-133, CPSY2007-76, RECONF2007-79 
Volume (vol) vol.107 
Number (no) no.415(VLD), no.417(CPSY), no.419(RECONF) 
Page pp.89-94 
#Pages 6 
Date of Issue 2008-01-10 (VLD, CPSY, RECONF) 

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