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Paper Abstract and Keywords
Presentation 2008-03-28 09:30
On Evaluation Methods of nMOS Level Shifter Circuits
Makoto Otsu, Shingo Takahashi, Shuji Tsukiyama (Chuo Univ.), Masanori Hashimoto (Osaka Univ.), Isao Shirakawa (Univ. of Hyogo) DC2007-104 CPSY2007-100
Abstract (in Japanese) (See Japanese page) 
(in English) When the process technology or required specification is changed, we face a problem of finding the optimum circuit among various circuits with the same functionality. The problem is not easy to solve, since there exist many metrics to evaluate the circuits. This paper proposes a method to compare circuits with the use of a circuit optimizer and applies the method to nMOS level shifter circuits. The experimental results show that the method helps capturing the circuit features and devising a new level shifter.
Keyword (in Japanese) (See Japanese page) 
(in English) nMOS level shifter / driver circuit for LCD / circuit performance / evaluation method / / / /  
Reference Info. IEICE Tech. Rep., vol. 107, no. 559, DC2007-104, pp. 121-126, March 2008.
Paper # DC2007-104 
Date of Issue 2008-03-20 (DC, CPSY) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee DC CPSY IPSJ-SLDM IPSJ-EMB  
Conference Date 2008-03-27 - 2008-03-28 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
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Paper Information
Registration To DC 
Conference Code 2008-03-DC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) On Evaluation Methods of nMOS Level Shifter Circuits 
Sub Title (in English)  
Keyword(1) nMOS level shifter  
Keyword(2) driver circuit for LCD  
Keyword(3) circuit performance  
Keyword(4) evaluation method  
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1st Author's Name Makoto Otsu  
1st Author's Affiliation Chuo University (Chuo Univ.)
2nd Author's Name Shingo Takahashi  
2nd Author's Affiliation Chuo University (Chuo Univ.)
3rd Author's Name Shuji Tsukiyama  
3rd Author's Affiliation Chuo University (Chuo Univ.)
4th Author's Name Masanori Hashimoto  
4th Author's Affiliation Osaka University (Osaka Univ.)
5th Author's Name Isao Shirakawa  
5th Author's Affiliation University of Hyogo (Univ. of Hyogo)
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Speaker Author-1 
Date Time 2008-03-28 09:30:00 
Presentation Time 20 minutes 
Registration for DC 
Paper # DC2007-104, CPSY2007-100 
Volume (vol) vol.107 
Number (no) no.559(DC), no.558(CPSY) 
Page pp.121-126 
#Pages
Date of Issue 2008-03-20 (DC, CPSY) 


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