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| Presentation | 2008-04-18 10:00 A 65nm Pure CMOS One-time Programmable Memory Using a Two-Port Antifuse Cell Implemented in a Matrix Structure Kensuke Matsufuji, Toshimasa Namekawa, Hiroaki Nakano, Hiroshi Ito, Osamu Wada, Nobuaki Otsuka (Toshiba)  ICD2008-8 Link to ES Tech. Rep. Archives: ICD2008-8 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | A Pure CMOS One-time Programmable（PCOP）memory using an antifuse is presented. PCOP memory adopts two-port cell architecture implemented in a matrix structure. This architecture achieves optimization of performance both for programming and reading. Furthermore, it solves the write disturb problem and realizes pseudo “1” read test. An 8Kbit macro is developed utilizing a 65nm pure CMOS logic technology. The cell area and the macro size are 15.3m2 and 0.244mm2, respectively. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | antifuse / one-time programmable / gate-oxide breakdown / write disturb / pseudo "1" read test / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 108, no. 6, ICD2008-8, pp. 39-44, April 2008. | |
| Paper # | ICD2008-8 | |
| Date of Issue | 2008-04-10 (ICD) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | ICD2008-8 Link to ES Tech. Rep. Archives: ICD2008-8 |
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| Conference Information | |
| Committee | ICD |
| Conference Date | 2008-04-17 - 2008-04-18 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | ICD |
| Conference Code | 2008-04-ICD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A 65nm Pure CMOS One-time Programmable Memory Using a Two-Port Antifuse Cell Implemented in a Matrix Structure |
| Sub Title (in English) | |
| Keyword(1) | antifuse |
| Keyword(2) | one-time programmable |
| Keyword(3) | gate-oxide breakdown |
| Keyword(4) | write disturb |
| Keyword(5) | pseudo "1" read test |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Kensuke Matsufuji |
| 1st Author's Affiliation | Toshiba Corporation (Toshiba) |
| 2nd Author's Name | Toshimasa Namekawa |
| 2nd Author's Affiliation | Toshiba Corporation (Toshiba) |
| 3rd Author's Name | Hiroaki Nakano |
| 3rd Author's Affiliation | Toshiba Corporation (Toshiba) |
| 4th Author's Name | Hiroshi Ito |
| 4th Author's Affiliation | Toshiba Corporation (Toshiba) |
| 5th Author's Name | Osamu Wada |
| 5th Author's Affiliation | Toshiba Corporation (Toshiba) |
| 6th Author's Name | Nobuaki Otsuka |
| 6th Author's Affiliation | Toshiba Corporation (Toshiba) |
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| Speaker | Author-1 |
| Date Time | 2008-04-18 10:00:00 |
| Presentation Time | 25 minutes |
| Registration for | ICD |
| Paper # | ICD2008-8 |
| Volume (vol) | vol.108 |
| Number (no) | no.6 |
| Page | pp.39-44 |
| #Pages | 6 |
| Date of Issue | 2008-04-10 (ICD) |
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