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Paper Abstract and Keywords
Presentation 2009-01-22 15:50
A Variable Time Step Method of Implicit Runge-Kutta Algorithm for Circuit Simulation
Yasuhiko Tohyama, Yutaka Takakura, Jun Shirataki, Makiko Okumura (KAIT) CAS2008-78 NLP2008-108
Abstract (in Japanese) (See Japanese page) 
(in English) This paper describs the algorithm of the variable time step when implicit Runge-Kutta(IRK) methods were applied to the circuit simulation.
In the IRK methods, although it is high order numerical integration and excellent stabilities, it is necessary to evaluate the circuit equations of intermediate time points and a future point at the same time. Therefore, the scale of the circuit becomes large, computational cost increases.
Fortunately, we can use larger time step to get the same accuracy than conventional numerical integration methods, such as trapezoidal or the 2nd order Gear's methods.
We use interpolation in order to smooth waveforms, since large time step are used.
Keyword (in Japanese) (See Japanese page) 
(in English) Implicit Runge-Kutta / Variable Time Step / Spline Interpolation / Numerical Integration / Circuit Simulation / Radau / Lobatto / Nonlinear Elements  
Reference Info. IEICE Tech. Rep., vol. 108, no. 389, NLP2008-108, pp. 81-86, Jan. 2009.
Paper # NLP2008-108 
Date of Issue 2009-01-15 (CAS, NLP) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee CAS NLP  
Conference Date 2009-01-22 - 2009-01-23 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To NLP 
Conference Code 2009-01-CAS-NLP 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Variable Time Step Method of Implicit Runge-Kutta Algorithm for Circuit Simulation 
Sub Title (in English)  
Keyword(1) Implicit Runge-Kutta  
Keyword(2) Variable Time Step  
Keyword(3) Spline Interpolation  
Keyword(4) Numerical Integration  
Keyword(5) Circuit Simulation  
Keyword(6) Radau  
Keyword(7) Lobatto  
Keyword(8) Nonlinear Elements  
1st Author's Name Yasuhiko Tohyama  
1st Author's Affiliation Kanagawa Institute of Technology (KAIT)
2nd Author's Name Yutaka Takakura  
2nd Author's Affiliation Kanagawa Institute of Technology (KAIT)
3rd Author's Name Jun Shirataki  
3rd Author's Affiliation Kanagawa Institute of Technology (KAIT)
4th Author's Name Makiko Okumura  
4th Author's Affiliation Kanagawa Institute of Technology (KAIT)
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Speaker Author-1 
Date Time 2009-01-22 15:50:00 
Presentation Time 20 minutes 
Registration for NLP 
Paper # CAS2008-78, NLP2008-108 
Volume (vol) vol.108 
Number (no) no.388(CAS), no.389(NLP) 
Page pp.81-86 
#Pages 6 
Date of Issue 2009-01-15 (CAS, NLP) 

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