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| Presentation | 2009-01-30 12:45 A Low Energy ASIP Synthesis Method Based on Reducing Instruction Memory Access Yuta Kobayashi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.)  VLD2008-116 CPSY2008-78 RECONF2008-80 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In this paper, we propose an energy-efficient ASIP synthesis method based on reducing instruction memory access. Since an instruction memory is one of the main energy consumers in ASIP, reducing consumed energy in instruction memory is an important problem. We propose a vertical combined instruction that stores two or more instructions issued sequentially into a single instruction. Then we propose a method to synthesize the vertical combined instructions from a scheduled CDFG. Since the number of instruction memory accesses is reduced, the energy consumption can also be reduced. In experimental results, we confirm reducing approximately 41.9% energy consumption at a whole processor system including memories. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | energy consumption / ASIP / VLIW / instruction memory / instruction fetch / instruction-set / / | |
| Reference Info. | IEICE Tech. Rep., vol. 108, no. 412, VLD2008-116, pp. 147-152, Jan. 2009. | |
| Paper # | VLD2008-116 | |
| Date of Issue | 2009-01-22 (VLD, CPSY, RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2008-116 CPSY2008-78 RECONF2008-80 |
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| Conference Information | |
| Committee | VLD CPSY RECONF IPSJ-SLDM |
| Conference Date | 2009-01-29 - 2009-01-30 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2009-01-VLD-CPSY-RECONF-SLDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Low Energy ASIP Synthesis Method Based on Reducing Instruction Memory Access |
| Sub Title (in English) | |
| Keyword(1) | energy consumption |
| Keyword(2) | ASIP |
| Keyword(3) | VLIW |
| Keyword(4) | instruction memory |
| Keyword(5) | instruction fetch |
| Keyword(6) | instruction-set |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Yuta Kobayashi |
| 1st Author's Affiliation | Waseda University (Waseda Univ.) |
| 2nd Author's Name | Nozomu Togawa |
| 2nd Author's Affiliation | Waseda University (Waseda Univ.) |
| 3rd Author's Name | Masao Yanagisawa |
| 3rd Author's Affiliation | Waseda University (Waseda Univ.) |
| 4th Author's Name | Tatsuo Ohtsuki |
| 4th Author's Affiliation | Waseda University (Waseda Univ.) |
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| Speaker | Author-1 |
| Date Time | 2009-01-30 12:45:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2008-116, CPSY2008-78, RECONF2008-80 |
| Volume (vol) | vol.108 |
| Number (no) | no.412(VLD), no.413(CPSY), no.414(RECONF) |
| Page | pp.147-152 |
| #Pages | 6 |
| Date of Issue | 2009-01-22 (VLD, CPSY, RECONF) |
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