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Paper Abstract and Keywords
Presentation 2009-03-06 09:00
Design and implementation of on-chip-network swith for real-time system
Takuma Kogo, Kazutoshi Suito, Nobuyuki Yamasaki (Keio Univ.) CPSY2008-96 DC2008-87
Abstract (in Japanese) (See Japanese page) 
(in English) In recent years, processors like System-on-Chip (SoC) which various modules were integrated on have been demanded even in embedded real-time systems. If number of modules on chip increase, the bus which is classic on-chip interconnects causes significant latency when trafic becomes heavy. It is good approach to adopt Network-on-Chip (NoC) which does not case significant latency when number of connected modules increase, because it is problem for real-time systems not to be able to guarantee deadline due to significant latency. However, NoC has the problem that the area of the chip grows because the buffer and the amount of wire are larger than the bus which is common interconnects. In this paper, we propose the network-switch which has a real-time function and be able to reduce the area. we evaluated to confirm the proposal technique was effective.
Keyword (in Japanese) (See Japanese page) 
(in English) Real-time / Priority / NoC / / / / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 464, DC2008-87, pp. 49-54, March 2009.
Paper # DC2008-87 
Date of Issue 2009-02-26 (CPSY, DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2008-96 DC2008-87

Conference Information
Committee DC CPSY IPSJ-SLDM IPSJ-EMB  
Conference Date 2009-03-05 - 2009-03-06 
Place (in Japanese) (See Japanese page) 
Place (in English) Sado Island Integrated Development Center 
Topics (in Japanese) (See Japanese page) 
Topics (in English) ETNET2009 
Paper Information
Registration To DC 
Conference Code 2009-03-DC-CPSY-SLDM-EMB 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Design and implementation of on-chip-network swith for real-time system 
Sub Title (in English)  
Keyword(1) Real-time  
Keyword(2) Priority  
Keyword(3) NoC  
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1st Author's Name Takuma Kogo  
1st Author's Affiliation Keio University (Keio Univ.)
2nd Author's Name Kazutoshi Suito  
2nd Author's Affiliation Keio University (Keio Univ.)
3rd Author's Name Nobuyuki Yamasaki  
3rd Author's Affiliation Keio University (Keio Univ.)
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Speaker Author-1 
Date Time 2009-03-06 09:00:00 
Presentation Time 30 minutes 
Registration for DC 
Paper # CPSY2008-96, DC2008-87 
Volume (vol) vol.108 
Number (no) no.463(CPSY), no.464(DC) 
Page pp.49-54 
#Pages 6 
Date of Issue 2009-02-26 (CPSY, DC) 

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