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Paper Abstract and Keywords
Presentation 2009-03-06 09:30
Design and Implementation of the Thread Scheduling Scheme for Responsive Multithreaded Processor
Hiroyuki Umeo, Kazutoshi Suito, Akira Takeda, Shinpei Kato, Nobuyuki Yamasaki (Keio Univ.) CPSY2008-97 DC2008-88
Abstract (in Japanese) (See Japanese page) 
(in English) Responsive Multithreaded Processor for real-time processing can execute eight threads simultaneously in priority order without context switching. When over nine threads are executed, context switching is required. A real-time scheduler should be called periodically and release times of all tasks are checked. This paper proposes thread scheduling scheme for RMT Processor. RMT PU, which is processing core of RMT processor, holds the periods of all threads and starts threads by hardware without periodic calls of the scheduler. In addition, threads in context cache are compared with threads in execution, and context switching will be realized by hardware. Our thread scheduling scheme reduces scheduling overheads so that traditional software scheduling can be unnecessary.
Keyword (in Japanese) (See Japanese page) 
(in English) RMT Processor / Scheduling Overhead / Thread Scheduling / / / / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 464, DC2008-88, pp. 55-60, March 2009.
Paper # DC2008-88 
Date of Issue 2009-02-26 (CPSY, DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2008-97 DC2008-88

Conference Information
Committee DC CPSY IPSJ-SLDM IPSJ-EMB  
Conference Date 2009-03-05 - 2009-03-06 
Place (in Japanese) (See Japanese page) 
Place (in English) Sado Island Integrated Development Center 
Topics (in Japanese) (See Japanese page) 
Topics (in English) ETNET2009 
Paper Information
Registration To DC 
Conference Code 2009-03-DC-CPSY-SLDM-EMB 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Design and Implementation of the Thread Scheduling Scheme for Responsive Multithreaded Processor 
Sub Title (in English)  
Keyword(1) RMT Processor  
Keyword(2) Scheduling Overhead  
Keyword(3) Thread Scheduling  
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1st Author's Name Hiroyuki Umeo  
1st Author's Affiliation Keio University (Keio Univ.)
2nd Author's Name Kazutoshi Suito  
2nd Author's Affiliation Keio University (Keio Univ.)
3rd Author's Name Akira Takeda  
3rd Author's Affiliation Keio University (Keio Univ.)
4th Author's Name Shinpei Kato  
4th Author's Affiliation Keio University (Keio Univ.)
5th Author's Name Nobuyuki Yamasaki  
5th Author's Affiliation Keio University (Keio Univ.)
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Speaker Author-1 
Date Time 2009-03-06 09:30:00 
Presentation Time 30 minutes 
Registration for DC 
Paper # CPSY2008-97, DC2008-88 
Volume (vol) vol.108 
Number (no) no.463(CPSY), no.464(DC) 
Page pp.55-60 
#Pages 6 
Date of Issue 2009-02-26 (CPSY, DC) 

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