Information: Join today and make your research activities more affordable! Technical workshop participation fees and annual registration fees are available at member rates.
Notice: [Important] Announcement of Changes to Registration Fee Payment and Manuscript Upload Procedures for IEICE Technical Meetings
IEICE Technical Committee Submission System
Conference Paper's Information		 Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2009-03-06 15:50
Simulation study of analog input buffer characteristics in CMOS integrated circuits
Yuuto Horiki, Keiko Fukuda (Tokyo Metropolitan Coll. of Ind Tech.) EMD2008-144
Abstract (in Japanese) (See Japanese page) 
(in English) Complementary-type analog input buffer is proposed for low-voltage operation in CMOS integrated circuits. It consists of a conventional source-follower and an inverter-type input buffer. Small-signal analysis and circuit simulation show that our new complementary-type analog input buffer has a comparable bandwidth and twice gain compared to source-follower. It is suitable for interface circuits for differential signal and is effective for common-mode noise reduction.
Keyword (in Japanese) (See Japanese page) 
(in English) input buffer / analog CMOS integrated circuits / low voltage operation / / / / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 466, EMD2008-144, pp. 41-44, March 2009.
Paper # EMD2008-144 
Date of Issue 2009-02-27 (EMD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF EMD2008-144

Conference Information
Committee EMD  
Conference Date 2009-03-06 - 2009-03-06 
Place (in Japanese) (See Japanese page) 
Place (in English) Kougakuin Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Short note (Graduation thesis and master's thesis) 
Paper Information
Registration To EMD 
Conference Code 2009-03-EMD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Simulation study of analog input buffer characteristics in CMOS integrated circuits 
Sub Title (in English)  
Keyword(1) input buffer  
Keyword(2) analog CMOS integrated circuits  
Keyword(3) low voltage operation  
Keyword(4)  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Yuuto Horiki  
1st Author's Affiliation Tokyo Metropolitan College of Industrial Technology (Tokyo Metropolitan Coll. of Ind Tech.)
2nd Author's Name Keiko Fukuda  
2nd Author's Affiliation Tokyo Metropolitan College of Industrial Technology (Tokyo Metropolitan Coll. of Ind Tech.)
3rd Author's Name  
3rd Author's Affiliation ()
4th Author's Name  
4th Author's Affiliation ()
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
21st Author's Name  
21st Author's Affiliation ()
22nd Author's Name  
22nd Author's Affiliation ()
23rd Author's Name  
23rd Author's Affiliation ()
24th Author's Name  
24th Author's Affiliation ()
25th Author's Name  
25th Author's Affiliation ()
26th Author's Name / /
26th Author's Affiliation ()
()
27th Author's Name / /
27th Author's Affiliation ()
()
28th Author's Name / /
28th Author's Affiliation ()
()
29th Author's Name / /
29th Author's Affiliation ()
()
30th Author's Name / /
30th Author's Affiliation ()
()
31st Author's Name / /
31st Author's Affiliation ()
()
32nd Author's Name / /
32nd Author's Affiliation ()
()
33rd Author's Name / /
33rd Author's Affiliation ()
()
34th Author's Name / /
34th Author's Affiliation ()
()
35th Author's Name / /
35th Author's Affiliation ()
()
36th Author's Name / /
36th Author's Affiliation ()
()
Speaker Author-1 
Date Time 2009-03-06 15:50:00 
Presentation Time 15 minutes 
Registration for EMD 
Paper # EMD2008-144 
Volume (vol) vol.108 
Number (no) no.466 
Page pp.41-44 
#Pages 4 
Date of Issue 2009-02-27 (EMD) 

[Return to Top Page]

[Return to IEICE Web Page]
The Institute of Electronics, Information and Communication Engineers (IEICE), Japan