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Paper Abstract and Keywords
Presentation 2009-03-12 09:40
The implementation of DES cryptographic circuit and the evaluation of DPA attack resistance using Domino-RSL technique
Kenji Kojima, Kazuki Okuyama, Yuki Makino, Takeshi Fujino (Ritsumeikandai Univ.) VLD2008-140
Abstract (in Japanese) (See Japanese page) 
(in English) To achieve cryptographic circuit that has tamper resistance, it is necessary that we take a LSI design considered countermeasures against DPA (Differential Power Analysis) including Side Channel Attack. In the present research, we propose the method utilizing Domino-RSL logic that can be hazard-free and make transition probability at gate 1/2 using random value to take countermeasures at primitive gate level. We explain about implementation method and area evaluation at DES cryptographic circuit, especially S-box using Domino-RSL logic, and report the evaluated results on the resistance against DPA Attack.
Keyword (in Japanese) (See Japanese page) 
(in English) Side Channel Attack / DPA / RSL / Domino logic / Domino-RSL / DES / Simplified-DES /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 478, VLD2008-140, pp. 83-88, March 2009.
Paper # VLD2008-140 
Date of Issue 2009-03-04 (VLD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2008-140

Conference Information
Committee VLD  
Conference Date 2009-03-11 - 2009-03-13 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Technology for a System-on-Silicon 
Paper Information
Registration To VLD 
Conference Code 2009-03-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) The implementation of DES cryptographic circuit and the evaluation of DPA attack resistance using Domino-RSL technique 
Sub Title (in English)  
Keyword(1) Side Channel Attack  
Keyword(2) DPA  
Keyword(3) RSL  
Keyword(4) Domino logic  
Keyword(5) Domino-RSL  
Keyword(6) DES  
Keyword(7) Simplified-DES  
Keyword(8)  
1st Author's Name Kenji Kojima  
1st Author's Affiliation Ritsumeikan University (Ritsumeikandai Univ.)
2nd Author's Name Kazuki Okuyama  
2nd Author's Affiliation Ritsumeikan University (Ritsumeikandai Univ.)
3rd Author's Name Yuki Makino  
3rd Author's Affiliation Ritsumeikan University (Ritsumeikandai Univ.)
4th Author's Name Takeshi Fujino  
4th Author's Affiliation Ritsumeikan University (Ritsumeikandai Univ.)
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Speaker Author-1 
Date Time 2009-03-12 09:40:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2008-140 
Volume (vol) vol.108 
Number (no) no.478 
Page pp.83-88 
#Pages 6 
Date of Issue 2009-03-04 (VLD) 

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