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Paper Abstract and Keywords
Presentation 2009-05-14 13:00
Performance Evaluation of Reconfigurable Processor Hy-DiSC based on MeP Hardware Extension
Ken'ichi Umeda, Takuro Uchida, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ) RECONF2009-1
Abstract (in Japanese) (See Japanese page) 
(in English) We have developed the reconfigurable processor Hy-DiSC for stream processing. Hy-DiSC processor consists of MeP and DS-HIE processor: MeP executes serial part of program and controls DS-HIE processor, and
DS-HIE processor executes stream processing part of program. In cooperation of MeP and DS-HIE processor, MeP needs to constantly supply data to DS-HIE processor to achieve high throughput. But it needs frequent memory access. If frequent cache miss is occurred on the memory access, the throughput was reduced by the increase of the latency of data supplying. Therefore it is important to consider about the efficiency of memory access for Hy-DiSC processor. This paper shows two evaluations about memory accesses: data transfer latency on different cache size, and execution cycles on different data block size. To evaluate these effects by memory access, we have developed Hy-DiSC simulator. From the results, the effect to performance caused by cache size was small, but we found that the bottleneck was the control of the DS-HIE processor executed by MeP.
Keyword (in Japanese) (See Japanese page) 
(in English) Reconfigurable Processor / Hy-DiSC / MeP / Memory Access / Performance Evaluation / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 26, RECONF2009-1, pp. 1-6, May 2009.
Paper # RECONF2009-1 
Date of Issue 2009-05-07 (RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF RECONF2009-1

Conference Information
Committee RECONF  
Conference Date 2009-05-14 - 2009-05-15 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To RECONF 
Conference Code 2009-05-RECONF 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Performance Evaluation of Reconfigurable Processor Hy-DiSC based on MeP Hardware Extension 
Sub Title (in English)  
Keyword(1) Reconfigurable Processor  
Keyword(2) Hy-DiSC  
Keyword(3) MeP  
Keyword(4) Memory Access  
Keyword(5) Performance Evaluation  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Ken'ichi Umeda  
1st Author's Affiliation Hiroshima City University (Hiroshima City Univ)
2nd Author's Name Takuro Uchida  
2nd Author's Affiliation Hiroshima City University (Hiroshima City Univ)
3rd Author's Name Kazuya Tanigawa  
3rd Author's Affiliation Hiroshima City University (Hiroshima City Univ)
4th Author's Name Tetsuo Hironaka  
4th Author's Affiliation Hiroshima City University (Hiroshima City Univ)
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Speaker Author-1 
Date Time 2009-05-14 13:00:00 
Presentation Time 30 minutes 
Registration for RECONF 
Paper # RECONF2009-1 
Volume (vol) vol.109 
Number (no) no.26 
Page pp.1-6 
#Pages 6 
Date of Issue 2009-05-07 (RECONF) 

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