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Paper Abstract and Keywords
Presentation 2009-05-15 15:20
Acceleration of UPACS subroutines with FPGAs
Takaaki Yokoyama, Hirokazu Morishita (Keio Univ.), Yasunori Osana (Seikei Univ.), Naoyuki Fujita (JAXA), Hideharu Amano (Keio Univ.) RECONF2009-18
Abstract (in Japanese) (See Japanese page) 
(in English) A cost effective reconfigurable processing engine using multiple FPGAs for accelerating UPACS, a CFD package produced by JAXA has been developed. Two kernels; error modification routine and time integral routine; have been implemented in our past research. Here, we implemented a pipelined structure of the third routine; cell face variables routine on Virtex-5 FPGAs. 209 times performance of a PC using Intel Core 2Duo(2.66GHz) can be achieved. 37% slices can be reduced by reducing the execution time to 192 times.
Keyword (in Japanese) (See Japanese page) 
(in English) FPGA / CFD / Custum Computer / / / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 26, RECONF2009-18, pp. 103-108, May 2009.
Paper # RECONF2009-18 
Date of Issue 2009-05-07 (RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF RECONF2009-18

Conference Information
Committee RECONF  
Conference Date 2009-05-14 - 2009-05-15 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To RECONF 
Conference Code 2009-05-RECONF 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Acceleration of UPACS subroutines with FPGAs 
Sub Title (in English)  
Keyword(1) FPGA  
Keyword(2) CFD  
Keyword(3) Custum Computer  
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1st Author's Name Takaaki Yokoyama  
1st Author's Affiliation Keio University (Keio Univ.)
2nd Author's Name Hirokazu Morishita  
2nd Author's Affiliation Keio University (Keio Univ.)
3rd Author's Name Yasunori Osana  
3rd Author's Affiliation Seikei University (Seikei Univ.)
4th Author's Name Naoyuki Fujita  
4th Author's Affiliation Japan Aerospace Exploration Agency (JAXA)
5th Author's Name Hideharu Amano  
5th Author's Affiliation Keio University (Keio Univ.)
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Speaker Author-1 
Date Time 2009-05-15 15:20:00 
Presentation Time 30 minutes 
Registration for RECONF 
Paper # RECONF2009-18 
Volume (vol) vol.109 
Number (no) no.26 
Page pp.103-108 
#Pages 6 
Date of Issue 2009-05-07 (RECONF) 

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