| Paper Abstract and Keywords |
| Presentation |
2009-06-05 14:50
Study for extracting the characteristics of LSI power supply at high frequency including the parasitic coupling between package and chip Tomohiro Kita, Yuichi Mabuchi, Hiroshi Tanaka, Takashi Hisakado, Osami Wada (Kyoto Univ.), Atsushi Nakamura (Renesas Tech.) EMCJ2009-31 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
To establish more efficient EMC designing method of electronic apparatuses, constructing a precise EMC macromodel of IC/LSI power supply blocks is needed for simulation of noise levels of current flowing through
the power distribution networks. For modeling in GHz frequency range, the characteristics between a chip and its package, or a package and a PCB should be considered. In this report, the impedance characteristics of a chip mounted on a BGA package is evaluated based on bare-chip characteristics extracted by measurement, package parameters identified by numerical simulation, and the estimated value of capacitance existing between the silicon die and the package plane. Good agreement between simulation and measurement is obtained up to about 4 GHz. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
LSI package / EMC macromodel / chip-package co-design / parasitic capacitance / LSI power distribution network / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 109, no. 76, EMCJ2009-31, pp. 51-56, June 2009. |
| Paper # |
EMCJ2009-31 |
| Date of Issue |
2009-05-29 (EMCJ) |
| ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
EMCJ2009-31 |
| Conference Information |
| Committee |
EMCJ |
| Conference Date |
2009-06-05 - 2009-06-05 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Tokyo Big Sight (Tokyo International Exihibition Center) |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Young Scientists Award for Excellent Presentations |
| Paper Information |
| Registration To |
EMCJ |
| Conference Code |
2009-06-EMCJ |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
Study for extracting the characteristics of LSI power supply at high frequency including the parasitic coupling between package and chip |
| Sub Title (in English) |
|
| Keyword(1) |
LSI package |
| Keyword(2) |
EMC macromodel |
| Keyword(3) |
chip-package co-design |
| Keyword(4) |
parasitic capacitance |
| Keyword(5) |
LSI power distribution network |
| Keyword(6) |
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| Keyword(7) |
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| Keyword(8) |
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| 1st Author's Name |
Tomohiro Kita |
| 1st Author's Affiliation |
Kyoto University (Kyoto Univ.) |
| 2nd Author's Name |
Yuichi Mabuchi |
| 2nd Author's Affiliation |
Kyoto University (Kyoto Univ.) |
| 3rd Author's Name |
Hiroshi Tanaka |
| 3rd Author's Affiliation |
Kyoto University (Kyoto Univ.) |
| 4th Author's Name |
Takashi Hisakado |
| 4th Author's Affiliation |
Kyoto University (Kyoto Univ.) |
| 5th Author's Name |
Osami Wada |
| 5th Author's Affiliation |
Kyoto University (Kyoto Univ.) |
| 6th Author's Name |
Atsushi Nakamura |
| 6th Author's Affiliation |
Renesas Technology Corp. (Renesas Tech.) |
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| Speaker |
Author-1 |
| Date Time |
2009-06-05 14:50:00 |
| Presentation Time |
25 minutes |
| Registration for |
EMCJ |
| Paper # |
EMCJ2009-31 |
| Volume (vol) |
vol.109 |
| Number (no) |
no.76 |
| Page |
pp.51-56 |
| #Pages |
6 |
| Date of Issue |
2009-05-29 (EMCJ) |