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Paper Abstract and Keywords
Presentation 2009-08-03 10:20
Ising Spin-Grass Error Correction for Unreliable Nanoelectronic Logic Circuits
Yasuhiro Okada, Hisato Fujisaka, Takeshi Kamio, Chang-Jun Ahn, Kazuhisa Haeiwa (Hiroshima City Univ.) NLP2009-45
Abstract (in Japanese) (See Japanese page) 
(in English) This paper presents a fault and defect tolerance technique based on Ising spin-glass (ISG) for nanoelectronic logic circuits.
An equivalent fault and defect-tolerant circuit of a logic circuit is constructed by cascading an input transformation circuit, a redundant circuit, and an ISG which corrects errors caused in the redundant circuit.
We built combinatorial and sequential circuits of this structure and evaluated the error correction performance of their internal ISGs.
The ISG exhibits high performance on correcting both permanent defect and transient errors in combinatorial circuits.
The ISG has error correction capability also in sequential circuits when the rate of errors in the ISG itself is low.
Keyword (in Japanese) (See Japanese page) 
(in English) Ising spin glass / logic circuit / fault tolerance / / / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 167, NLP2009-45, pp. 7-12, Aug. 2009.
Paper # NLP2009-45 
Date of Issue 2009-07-27 (NLP) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF NLP2009-45

Conference Information
Committee NLP  
Conference Date 2009-08-03 - 2009-08-04 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To NLP 
Conference Code 2009-08-NLP 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Ising Spin-Grass Error Correction for Unreliable Nanoelectronic Logic Circuits 
Sub Title (in English)  
Keyword(1) Ising spin glass  
Keyword(2) logic circuit  
Keyword(3) fault tolerance  
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1st Author's Name Yasuhiro Okada  
1st Author's Affiliation Hiroshima City University (Hiroshima City Univ.)
2nd Author's Name Hisato Fujisaka  
2nd Author's Affiliation Hiroshima City University (Hiroshima City Univ.)
3rd Author's Name Takeshi Kamio  
3rd Author's Affiliation Hiroshima City University (Hiroshima City Univ.)
4th Author's Name Chang-Jun Ahn  
4th Author's Affiliation Hiroshima City University (Hiroshima City Univ.)
5th Author's Name Kazuhisa Haeiwa  
5th Author's Affiliation Hiroshima City University (Hiroshima City Univ.)
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Speaker Author-1 
Date Time 2009-08-03 10:20:00 
Presentation Time 30 minutes 
Registration for NLP 
Paper # NLP2009-45 
Volume (vol) vol.109 
Number (no) no.167 
Page pp.7-12 
#Pages 6 
Date of Issue 2009-07-27 (NLP) 

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