| Paper Abstract and Keywords |
| Presentation |
2009-10-02 17:25
A fully-integrated clock reference generator with frequency-locked loop Ken Ueno, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.) ICD2009-61 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
A temperature- and supply-independent clock generator has been developed using 0.35-um CMOS technology. This generator is based on a simple frequency-locked loop technique and can be implemented monolithically without using LC resonant circuits, quartz resonators, and MEMS oscillators. A sample device that is tunable over a wide frequency range of 2-100 MHz was designed and fabricated. It showed a temperature coefficient of 90 ppm/degC, a line regulation of 4%/V, and a power dissipation of 180 uW, at a frequency of 30 MHz. The process sensitivity (sigma/mu) was 2.7%. This clock generator can be used as an on-chip reference clock circuit. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
CMOS / Reference clock / Oscillator / Frequency-locked loop / Fully-integrated / Temperature dependence / Low power / |
| Reference Info. |
IEICE Tech. Rep., vol. 109, no. 214, ICD2009-61, pp. 159-164, Oct. 2009. |
| Paper # |
ICD2009-61 |
| Date of Issue |
2009-09-24 (ICD) |
| ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
ICD2009-61 |
| Conference Information |
| Committee |
ICD ITE-IST |
| Conference Date |
2009-10-01 - 2009-10-02 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
CIC Tokyo (Tamachi) |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Analog, Mixed analog and digital, RF, and sensor interface circuitry |
| Paper Information |
| Registration To |
ICD |
| Conference Code |
2009-10-ICD-IST |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
A fully-integrated clock reference generator with frequency-locked loop |
| Sub Title (in English) |
|
| Keyword(1) |
CMOS |
| Keyword(2) |
Reference clock |
| Keyword(3) |
Oscillator |
| Keyword(4) |
Frequency-locked loop |
| Keyword(5) |
Fully-integrated |
| Keyword(6) |
Temperature dependence |
| Keyword(7) |
Low power |
| Keyword(8) |
|
| 1st Author's Name |
Ken Ueno |
| 1st Author's Affiliation |
Hokkaido Univeristy (Hokkaido Univ.) |
| 2nd Author's Name |
Tetsuya Asai |
| 2nd Author's Affiliation |
Hokkaido Univeristy (Hokkaido Univ.) |
| 3rd Author's Name |
Yoshihito Amemiya |
| 3rd Author's Affiliation |
Hokkaido Univeristy (Hokkaido Univ.) |
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| Speaker |
Author-1 |
| Date Time |
2009-10-02 17:25:00 |
| Presentation Time |
25 minutes |
| Registration for |
ICD |
| Paper # |
ICD2009-61 |
| Volume (vol) |
vol.109 |
| Number (no) |
no.214 |
| Page |
pp.159-164 |
| #Pages |
6 |
| Date of Issue |
2009-09-24 (ICD) |