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Paper Abstract and Keywords
Presentation 2009-10-20 13:50
Design of SFQ Floating-Point Units Using Nb Advanced Process
Toshiki Kainuma, Yasuhiro Shimamura, Fumishige Miyaoka, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Nat. Univ.), Akira Fujimaki, Naofumi Takagi, Kazuyoshi Takagi (Nagoya Univ.) SCE2009-19 Link to ES Tech. Rep. Archives: SCE2009-19
Abstract (in Japanese) (See Japanese page) 
(in English) We are developing a large-scale reconfigurable data-path (LSRDP) based on the single-flux-quantum (SFQ) circuits, which will be a fundamental technology for future petaflops-scale computing systems. The LSRDP is composed of a large number of floating-point units (FPUs) each of which is connected by reconfigurable routing networks. In the LSRDP, reputation loops in the source program are directly mapped to the LSRDP. The main advantage of the LSRDP is the reduction of the memory wall problem in the high-performance computing system. A memory access rate is considerably reduced, because the data are directly transferred between FPUs in the LSRDP without memory accesses.
Recently, the ISTEC Nb 10 kA/cm2 advanced process (ADP), which realizes SFQ circuits with two times faster operating speed than that of the conventional fabrication process has been developed. The final goal of the SFQ processor project with the LSRDP is to demonstrate a 50 GHz high-speed operation of SFQ LSRDP Systems. In this paper, we will show the design of component circuits of SFQ floating-point adders and multipliers using the ADP cell library.
Keyword (in Japanese) (See Japanese page) 
(in English) SFQ Circuit / Nb process / Floating-point unit / Floating-point adder / Floating-point multiplier / Reconfigurable data-path / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 236, SCE2009-19, pp. 13-18, Oct. 2009.
Paper # SCE2009-19 
Date of Issue 2009-10-13 (SCE) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SCE2009-19 Link to ES Tech. Rep. Archives: SCE2009-19

Conference Information
Committee SCE  
Conference Date 2009-10-20 - 2009-10-20 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Digital, etc. 
Paper Information
Registration To SCE 
Conference Code 2009-10-SCE 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Design of SFQ Floating-Point Units Using Nb Advanced Process 
Sub Title (in English)  
Keyword(1) SFQ Circuit  
Keyword(2) Nb process  
Keyword(3) Floating-point unit  
Keyword(4) Floating-point adder  
Keyword(5) Floating-point multiplier  
Keyword(6) Reconfigurable data-path  
Keyword(7)  
Keyword(8)  
1st Author's Name Toshiki Kainuma  
1st Author's Affiliation Yokohama National University (Yokohama Nat. Univ.)
2nd Author's Name Yasuhiro Shimamura  
2nd Author's Affiliation Yokohama National University (Yokohama Nat. Univ.)
3rd Author's Name Fumishige Miyaoka  
3rd Author's Affiliation Yokohama National University (Yokohama Nat. Univ.)
4th Author's Name Yuki Yamanashi  
4th Author's Affiliation Yokohama National University (Yokohama Nat. Univ.)
5th Author's Name Nobuyuki Yoshikawa  
5th Author's Affiliation Yokohama National University (Yokohama Nat. Univ.)
6th Author's Name Akira Fujimaki  
6th Author's Affiliation Nagoya University (Nagoya Univ.)
7th Author's Name Naofumi Takagi  
7th Author's Affiliation Nagoya University (Nagoya Univ.)
8th Author's Name Kazuyoshi Takagi  
8th Author's Affiliation Nagoya University (Nagoya Univ.)
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Speaker Author-1 
Date Time 2009-10-20 13:50:00 
Presentation Time 25 minutes 
Registration for SCE 
Paper # SCE2009-19 
Volume (vol) vol.109 
Number (no) no.236 
Page pp.13-18 
#Pages
Date of Issue 2009-10-13 (SCE) 


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