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| Presentation | 2009-12-03 15:20 A Virus Scanning Engine Using a Parallel Sieve Method and the MPU Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura (Kyushu Inst. of Tech.), Yoshifumi Kawamura (Renesas Technology Corp.)  RECONF2009-45 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In this paper, we show a new architecture for the virus scanning machine, which is different from that of the intrusion detection machine. The proposed method uses the two-stage matching, which is area-throughput efficient. That is, in the first stage, the hardware filter quickly scans to find possible matches, and in the second stage, the MPU scans the real match by a brute-force method. To make the hardware filter simply, we will introduce finite-input memory machine~(FIMM). To reduce the memory size in the FIMM, we will introduce the parallel sieve method. The proposed method uses memory, so the power consumption is lower than the TCAM-based method. The system is implemented on the Stratix III FPGA and three off chip SRAMs, where all ClamAV virus patterns~(514287) are stored. Comparison with existing methods, as for the area-throughput ratio, our method is 1.41-31.36 times more efficient. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | pattern matching / security / reconfigurable / FPGA / virus check / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 109, no. 320, RECONF2009-45, pp. 25-30, Dec. 2009. | |
| Paper # | RECONF2009-45 | |
| Date of Issue | 2009-11-26 (RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | RECONF2009-45 |
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| Conference Information | |
| Committee | VLD DC IPSJ-SLDM CPSY RECONF ICD CPM |
| Conference Date | 2009-12-02 - 2009-12-04 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kochi City Culture-Plaza |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2009 ―New Field of VLSI Design― |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2009-12-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Virus Scanning Engine Using a Parallel Sieve Method and the MPU |
| Sub Title (in English) | |
| Keyword(1) | pattern matching |
| Keyword(2) | security |
| Keyword(3) | reconfigurable |
| Keyword(4) | FPGA |
| Keyword(5) | virus check |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Hiroki Nakahara |
| 1st Author's Affiliation | Kyushu Institute of Technology (Kyushu Inst. of Tech.) |
| 2nd Author's Name | Tsutomu Sasao |
| 2nd Author's Affiliation | Kyushu Institute of Technology (Kyushu Inst. of Tech.) |
| 3rd Author's Name | Munehiro Matsuura |
| 3rd Author's Affiliation | Kyushu Institute of Technology (Kyushu Inst. of Tech.) |
| 4th Author's Name | Yoshifumi Kawamura |
| 4th Author's Affiliation | Renesas Technology Corporation. (Renesas Technology Corp.) |
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| Speaker | Author-1 |
| Date Time | 2009-12-03 15:20:00 |
| Presentation Time | 20 minutes |
| Registration for | RECONF |
| Paper # | RECONF2009-45 |
| Volume (vol) | vol.109 |
| Number (no) | no.320 |
| Page | pp.25-30 |
| #Pages | 6 |
| Date of Issue | 2009-11-26 (RECONF) |
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