| Paper Abstract and Keywords |
| Presentation |
2009-12-04 13:25
[Invited Talk]
A Project on Dynamically Reconfigurable Processors: MuCCRA
-- Design emvironment, Low Power design and 3D wireless interconnect -- Hideharu Amano (Keio Univ.) RECONF2009-51 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
Dynamically reconfigurable processor project MuCCRA(Multi-Core
Configurable Reconfigurable Architecture) aims to establish
an environment which can generate a multi-core dynamically reconfigurable
systems optimized for its target application.
The following researches are exerted for such an environment:
(1) Analysis of the architectural trade-off between performance, area
and power influenced by PE instruction, array size and interconnection network.
(2) Proposing new ideas to optimize context control mechanism, configuration data
transfer and context memory which improve any type of cores.
(3) Analysis and improving the energy efficiency which is the most promising
feature compared with other accelerators.
(4) Introducing 3D wireless interconnected structure for scalable extension of
the performance after chip fabrication.
This report introduces recent research results of the project. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
Dynamically Reconfigurable Processor / Low Power Design / 3D wireless interconnect / / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 109, no. 320, RECONF2009-51, pp. 61-66, Dec. 2009. |
| Paper # |
RECONF2009-51 |
| Date of Issue |
2009-11-26 (RECONF) |
| ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
RECONF2009-51 |
| Conference Information |
| Committee |
VLD DC IPSJ-SLDM CPSY RECONF ICD CPM |
| Conference Date |
2009-12-02 - 2009-12-04 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Kochi City Culture-Plaza |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Design Gaia 2009 ―New Field of VLSI Design― |
| Paper Information |
| Registration To |
RECONF |
| Conference Code |
2009-12-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
A Project on Dynamically Reconfigurable Processors: MuCCRA |
| Sub Title (in English) |
Design emvironment, Low Power design and 3D wireless interconnect |
| Keyword(1) |
Dynamically Reconfigurable Processor |
| Keyword(2) |
Low Power Design |
| Keyword(3) |
3D wireless interconnect |
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| 1st Author's Name |
Hideharu Amano |
| 1st Author's Affiliation |
Keio University (Keio Univ.) |
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| Speaker |
Author-1 |
| Date Time |
2009-12-04 13:25:00 |
| Presentation Time |
60 minutes |
| Registration for |
RECONF |
| Paper # |
RECONF2009-51 |
| Volume (vol) |
vol.109 |
| Number (no) |
no.320 |
| Page |
pp.61-66 |
| #Pages |
6 |
| Date of Issue |
2009-11-26 (RECONF) |