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Paper Abstract and Keywords
Presentation 2010-01-18 14:15
A study of the timing mechanism in a cerebellar network model implemented on FPGA
Kanako Matsuno (UEC), Takeru Honda (UEC/RIKEN), Hideaki Manabe (UEC), Shigeru Tanaka (UEC/RIKEN), Tetsuro Nishino (UEC) NC2009-72
Abstract (in Japanese) (See Japanese page) 
(in English) A cerebellar network model has been proposed previously,
in which the passage of time can be represented based on the non-recurrence of a temporal sequence of active
granule cell populations. In this study, we modified this model for its implementation on FPGA, a type of Field
Programmable LSI. The dynamics of the modified model showed that a sequence of active cell
populations changed to another for a change of external stimuli. After learning of several timings
for each of different external stimuli, the model represented all the timings without additional memory devices.
We also designed a practical circuit for the model on FPGA and found that the circuit can work on a real
time basis using a commercially available FPGA.
Keyword (in Japanese) (See Japanese page) 
(in English) hardware / LSI / cerebellum / learning timing / neural network / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 363, NC2009-72, pp. 7-12, Jan. 2010.
Paper # NC2009-72 
Date of Issue 2010-01-11 (NC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF NC2009-72

Conference Information
Committee NC  
Conference Date 2010-01-18 - 2010-01-19 
Place (in Japanese) (See Japanese page) 
Place (in English) Hyakunen-Kinen in Hokkaido University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Biomimetic information systems, Machine Learning 
Paper Information
Registration To NC 
Conference Code 2010-01-NC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A study of the timing mechanism in a cerebellar network model implemented on FPGA 
Sub Title (in English)  
Keyword(1) hardware  
Keyword(2) LSI  
Keyword(3) cerebellum  
Keyword(4) learning timing  
Keyword(5) neural network  
1st Author's Name Kanako Matsuno  
1st Author's Affiliation The University of Electro-Communications (UEC)
2nd Author's Name Takeru Honda  
2nd Author's Affiliation The University of Electro-Communications/RIKEN Brain Science Institute (UEC/RIKEN)
3rd Author's Name Hideaki Manabe  
3rd Author's Affiliation The University of Electro-Communications (UEC)
4th Author's Name Shigeru Tanaka  
4th Author's Affiliation The University of Electro-Communications/RIKEN Brain Science Institute (UEC/RIKEN)
5th Author's Name Tetsuro Nishino  
5th Author's Affiliation The University of Electro-Communications (UEC)
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Speaker Author-1 
Date Time 2010-01-18 14:15:00 
Presentation Time 25 minutes 
Registration for NC 
Paper # NC2009-72 
Volume (vol) vol.109 
Number (no) no.363 
Page pp.7-12 
Date of Issue 2010-01-11 (NC) 

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