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Paper Abstract and Keywords
Presentation 2010-02-15 14:10
On Calculation of Delay Test Quality for Test Cubes and X-filling
Shinji Oku, Seiji Kajihara, Yasuo Sato, Kohei Miyase, Xiaoqing Wen (Kyushu Inst. of Tech./JTS) DC2009-73
Abstract (in Japanese) (See Japanese page) 
(in English) This paper proposes a method to compute delay values in 3-valued fault simulation for test cubes which are test patterns with unspecified values (Xs). Because the detectable delay size of each fault by a test cube is not fixed before assigning logic values to the Xs in the test cube, the proposed method only computes a range of the detectable delay values of the test patterns covered by the test cubes. By using the proposed method, we derive the lowest and the highest test quality of test patterns covered by the test cubes. Furthermore, we also propose a GA (genetic algorithm)-based method to generate fully specified test patterns with high test quality from test cubes. Experimental results for benchmark circuits show the effectiveness of the proposed methods.
Keyword (in Japanese) (See Japanese page) 
(in English) delay test / SDQM / transition fault / fault simulation / test cube / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 416, DC2009-73, pp. 51-56, Feb. 2010.
Paper # DC2009-73 
Date of Issue 2010-02-08 (DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee DC  
Conference Date 2010-02-15 - 2010-02-15 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To DC 
Conference Code 2010-02-DC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) On Calculation of Delay Test Quality for Test Cubes and X-filling 
Sub Title (in English)  
Keyword(1) delay test  
Keyword(2) SDQM  
Keyword(3) transition fault  
Keyword(4) fault simulation  
Keyword(5) test cube  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Shinji Oku  
1st Author's Affiliation Kyushu Institute of Technology/JST, CREST (Kyushu Inst. of Tech./JTS)
2nd Author's Name Seiji Kajihara  
2nd Author's Affiliation Kyushu Institute of Technology/JST, CREST (Kyushu Inst. of Tech./JTS)
3rd Author's Name Yasuo Sato  
3rd Author's Affiliation Kyushu Institute of Technology/JST, CREST (Kyushu Inst. of Tech./JTS)
4th Author's Name Kohei Miyase  
4th Author's Affiliation Kyushu Institute of Technology/JST, CREST (Kyushu Inst. of Tech./JTS)
5th Author's Name Xiaoqing Wen  
5th Author's Affiliation Kyushu Institute of Technology/JST, CREST (Kyushu Inst. of Tech./JTS)
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Speaker Author-2 
Date Time 2010-02-15 14:10:00 
Presentation Time 25 minutes 
Registration for DC 
Paper # DC2009-73 
Volume (vol) vol.109 
Number (no) no.416 
Page pp.51-56 
#Pages 6 
Date of Issue 2010-02-08 (DC) 

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