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| Presentation | 2010-06-25 15:15 A test pattern matching method on BAST architecture using don't care identification for the detection of random pattern resistant faults Yun Chen, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyushu Univ.)  DC2010-11 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | BAST is one of techniques which are combined ATPG and BIST to reduce the amount of test data while maintaining the high test quality. On BAST architecture, a bit-flipping technique is used to convert pseudo-random patterns to deterministic patterns. In this paper, we use a don’t care identification technique for random-pattern resistant faults which identifies unnecessary signal value to detect the fault set as don’t care bits. Random-pattern resistant faults are defined that those detection time by a given test pattern set is equal or less than N. We propose a method of mapping between a pseudo-random pattern set and a deterministic pattern set for random-pattern resistant faults to which don’t care identification technique is applied. We also evaluate the relationship among the number of random-pattern resistant faults, the number of don’t care bits, the number of undetected faults, the number of bit-flips, and test application time for ITC’99 benchmark circuits. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | BAST Architecture / don’t care Identification / bit flipping reduction / random-pattern resistant faults / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 110, no. 106, DC2010-11, pp. 19-24, June 2010. | |
| Paper # | DC2010-11 | |
| Date of Issue | 2010-06-18 (DC) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | DC2010-11 |
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| Conference Information | |
| Committee | DC |
| Conference Date | 2010-06-25 - 2010-06-25 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | DC |
| Conference Code | 2010-06-DC |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A test pattern matching method on BAST architecture using don't care identification for the detection of random pattern resistant faults |
| Sub Title (in English) | |
| Keyword(1) | BAST Architecture |
| Keyword(2) | don’t care Identification |
| Keyword(3) | bit flipping reduction |
| Keyword(4) | random-pattern resistant faults |
| Keyword(5) | |
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| 1st Author's Name | Yun Chen |
| 1st Author's Affiliation | Nihon University (Nihon Univ.) |
| 2nd Author's Name | Toshinori Hosokawa |
| 2nd Author's Affiliation | Nihon University (Nihon Univ.) |
| 3rd Author's Name | Masayoshi Yoshimura |
| 3rd Author's Affiliation | Kyushu University (Kyushu Univ.) |
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| Speaker | Author-1 |
| Date Time | 2010-06-25 15:15:00 |
| Presentation Time | 30 minutes |
| Registration for | DC |
| Paper # | DC2010-11 |
| Volume (vol) | vol.110 |
| Number (no) | no.106 |
| Page | pp.19-24 |
| #Pages | 6 |
| Date of Issue | 2010-06-18 (DC) |
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