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Paper Abstract and Keywords
Presentation 2010-08-02 15:10
Circuit Implementation of an A/D Converter Based on the Scale-Adjusted β-Map Using a Discrete-Time Integrator
Yoshihiko Horio (Tokyo Denki Univ.), Tohru Kohda (Kyushu Univ.), Kazuyuki Aihara (Univ. of Tokyo.) CAS2010-43 NLP2010-59
Abstract (in Japanese) (See Japanese page) 
(in English) The beta-converter is robust against
errors in the quantizer threshold value like the
Sigma-Delta-type converters, and at the same time, shows the optimal
rate-distortion characteristic like the PCM-type converters.
We propose a circuit technique to implement an A/D converter based on
a scale-adjusted beta-map utilizing a discrete-time
integrator, which is a basic and preferred circuit element in
integrated circuits. We, then, propose
switched-capacitor scale-adjusted beta A/D converter circuits in
order to verify the proposed technique.
Moreover, we apply the proposed circuits to a chaos generator, which is
robust against non-idealities of the circuit elements and noise.
In addition, we confirm the
proposed circuits through SPICE simulations with ideal circuit elements.
Keyword (in Japanese) (See Japanese page) 
(in English) beta-map / A/D converter / chaos circuit / / / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 165, CAS2010-43, pp. 55-60, Aug. 2010.
Paper # CAS2010-43 
Date of Issue 2010-07-26 (CAS, NLP) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CAS2010-43 NLP2010-59

Conference Information
Committee NLP CAS  
Conference Date 2010-08-02 - 2010-08-03 
Place (in Japanese) (See Japanese page) 
Place (in English) Naruto University of Education 
Topics (in Japanese) (See Japanese page) 
Topics (in English) General 
Paper Information
Registration To CAS 
Conference Code 2010-08-NLP-CAS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Circuit Implementation of an A/D Converter Based on the Scale-Adjusted β-Map Using a Discrete-Time Integrator 
Sub Title (in English)  
Keyword(1) beta-map  
Keyword(2) A/D converter  
Keyword(3) chaos circuit  
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1st Author's Name Yoshihiko Horio  
1st Author's Affiliation Tokyo Denki University (Tokyo Denki Univ.)
2nd Author's Name Tohru Kohda  
2nd Author's Affiliation Kyushu University (Kyushu Univ.)
3rd Author's Name Kazuyuki Aihara  
3rd Author's Affiliation The University of Tokyo (Univ. of Tokyo.)
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Speaker Author-1 
Date Time 2010-08-02 15:10:00 
Presentation Time 25 minutes 
Registration for CAS 
Paper # CAS2010-43, NLP2010-59 
Volume (vol) vol.110 
Number (no) no.165(CAS), no.166(NLP) 
Page pp.55-60 
#Pages 6 
Date of Issue 2010-07-26 (CAS, NLP) 

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