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Paper Abstract and Keywords
Presentation 2010-08-05 15:00
Reachability Analysis for Timed Systems using Parallel Processing
Toshiaki Tanaka, Takeshi Nagaoka, Kozo Okano, Shinji Kusumoto (Osaka Univ.) SS2010-22
Abstract (in Japanese) (See Japanese page) 
(in English) This report proposes efficient parallel processing of reachability analysis for timed automaton. Our research group has already proposed CEGAR loop for timed automaton. The report proposes parallel processing version of the CEGAR loop. The new version performs in parallel model checking with different parameters and the master node synthesizes multiple counter examples generated by workers and refines the model. We have prototyped a tool and performed experiments. We found that some of the results show the effeciency of the proposed parallel processing.
Keyword (in Japanese) (See Japanese page) 
(in English) Timed Automaton / Model Checking / CEGAR / Parallel Processing / / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 169, SS2010-22, pp. 35-40, Aug. 2010.
Paper # SS2010-22 
Date of Issue 2010-07-29 (SS) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SS2010-22

Conference Information
Committee SS  
Conference Date 2010-08-05 - 2010-08-06 
Place (in Japanese) (See Japanese page) 
Place (in English) Asahikawa Shimin-Bunka-Kaikan (Civic Culture Hall) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) General 
Paper Information
Registration To SS 
Conference Code 2010-08-SS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Reachability Analysis for Timed Systems using Parallel Processing 
Sub Title (in English)  
Keyword(1) Timed Automaton  
Keyword(2) Model Checking  
Keyword(3) CEGAR  
Keyword(4) Parallel Processing  
1st Author's Name Toshiaki Tanaka  
1st Author's Affiliation Osaka University (Osaka Univ.)
2nd Author's Name Takeshi Nagaoka  
2nd Author's Affiliation Osaka University (Osaka Univ.)
3rd Author's Name Kozo Okano  
3rd Author's Affiliation Osaka University (Osaka Univ.)
4th Author's Name Shinji Kusumoto  
4th Author's Affiliation Osaka University (Osaka Univ.)
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Speaker Author-1 
Date Time 2010-08-05 15:00:00 
Presentation Time 30 minutes 
Registration for SS 
Paper # SS2010-22 
Volume (vol) vol.110 
Number (no) no.169 
Page pp.35-40 
Date of Issue 2010-07-29 (SS) 

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