Information: Join today and make your research activities more affordable! Technical workshop participation fees and annual registration fees are available at member rates.
Notice: [Important] Announcement of Changes to Registration Fee Payment and Manuscript Upload Procedures for IEICE Technical Meetings
IEICE Technical Committee Submission System
Conference Paper's Information		 Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2010-09-22 11:20
A Sorting-Based Architecture of Finding the First Two Minimum Values
Qian Xie, Zhixiang Chen, Satoshi Goto (Waseda Univ.) IT2010-43
Abstract (in Japanese) (See Japanese page) 
(in English) In this paper we propose a sorting-based architecture of finding the first two minimum values. Given a set of numbers X, efficient algorithm and its corresponding hardware implementation for finding the first minimum value, min_1st, second minimum value, min_2nd and the position of min_1st are greatly needed in the low-density parity-check (LDPC) decoder design. Compared to tree structure (TS) based approach, sorting-based (XS) approach needs less number of comparisons. According to the synthesis result, the proposed architecture achieves a lower hardware cost, especially when the number of X is bigger than 16.
Keyword (in Japanese) (See Japanese page) 
(in English) LDPC codes / min-sum algorithm / minimum finder / sorting-based architecture / / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 205, IT2010-43, pp. 57-61, Sept. 2010.
Paper # IT2010-43 
Date of Issue 2010-09-14 (IT) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF IT2010-43

Conference Information
Committee IT  
Conference Date 2010-09-21 - 2010-09-22 
Place (in Japanese) (See Japanese page) 
Place (in English) Tohoku Gakuin University 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To IT 
Conference Code 2010-09-IT 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Sorting-Based Architecture of Finding the First Two Minimum Values 
Sub Title (in English)  
Keyword(1) LDPC codes  
Keyword(2) min-sum algorithm  
Keyword(3) minimum finder  
Keyword(4) sorting-based architecture  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Qian Xie  
1st Author's Affiliation Waseda University (Waseda Univ.)
2nd Author's Name Zhixiang Chen  
2nd Author's Affiliation Waseda University (Waseda Univ.)
3rd Author's Name Satoshi Goto  
3rd Author's Affiliation Waseda University (Waseda Univ.)
4th Author's Name  
4th Author's Affiliation ()
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
21st Author's Name  
21st Author's Affiliation ()
22nd Author's Name  
22nd Author's Affiliation ()
23rd Author's Name  
23rd Author's Affiliation ()
24th Author's Name  
24th Author's Affiliation ()
25th Author's Name  
25th Author's Affiliation ()
26th Author's Name / /
26th Author's Affiliation ()
()
27th Author's Name / /
27th Author's Affiliation ()
()
28th Author's Name / /
28th Author's Affiliation ()
()
29th Author's Name / /
29th Author's Affiliation ()
()
30th Author's Name / /
30th Author's Affiliation ()
()
31st Author's Name / /
31st Author's Affiliation ()
()
32nd Author's Name / /
32nd Author's Affiliation ()
()
33rd Author's Name / /
33rd Author's Affiliation ()
()
34th Author's Name / /
34th Author's Affiliation ()
()
35th Author's Name / /
35th Author's Affiliation ()
()
36th Author's Name / /
36th Author's Affiliation ()
()
Speaker Author-1 
Date Time 2010-09-22 11:20:00 
Presentation Time 25 minutes 
Registration for IT 
Paper # IT2010-43 
Volume (vol) vol.110 
Number (no) no.205 
Page pp.57-61 
#Pages 5 
Date of Issue 2010-09-14 (IT) 

[Return to Top Page]

[Return to IEICE Web Page]
The Institute of Electronics, Information and Communication Engineers (IEICE), Japan