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Paper Abstract and Keywords
Presentation 2010-09-28 10:00
A Method of Analog IC Placement with Common Centroid Constraints
Keitaro Ue, Kunihiro Fujiyoshi (TUAT) VLD2010-48
Abstract (in Japanese) (See Japanese page) 
(in English) Monolithic IC has a characteristic that absolute error of device parameter is large but relative variability is small.
To reduce the relative variability,
some pairs of capacitors which have been derived by dividing each original capacitor into two halves are placed symmetrically with respect to a common center point.
Xiao proposed a method of obtaining a placement that satisfies the constraint that some pairs of cells must be placed with common centroid.
But his method has a defect that some blocks may be overlapped.
Therefore, in this paper, we propose a method of obtaining a placement that satisfies the constraint.
Keyword (in Japanese) (See Japanese page) 
(in English) common centroid / sequence-pair / analog IC / placement / / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 210, VLD2010-48, pp. 37-42, Sept. 2010.
Paper # VLD2010-48 
Date of Issue 2010-09-20 (VLD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2010-48

Conference Information
Committee VLD  
Conference Date 2010-09-27 - 2010-09-28 
Place (in Japanese) (See Japanese page) 
Place (in English) Kyoto Institute of Technology 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Physical design, etc 
Paper Information
Registration To VLD 
Conference Code 2010-09-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Method of Analog IC Placement with Common Centroid Constraints 
Sub Title (in English)  
Keyword(1) common centroid  
Keyword(2) sequence-pair  
Keyword(3) analog IC  
Keyword(4) placement  
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1st Author's Name Keitaro Ue  
1st Author's Affiliation Tokyo University of Agriculture and Technology (TUAT)
2nd Author's Name Kunihiro Fujiyoshi  
2nd Author's Affiliation Tokyo University of Agriculture and Technology (TUAT)
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Speaker Author-1 
Date Time 2010-09-28 10:00:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2010-48 
Volume (vol) vol.110 
Number (no) no.210 
Page pp.37-42 
#Pages 6 
Date of Issue 2010-09-20 (VLD) 

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