Paper Abstract and Keywords |
Presentation |
2010-11-30 13:15
Circuit Generation using High-Level Synthesis Tool in Reconfigurable HPC System Based on FPGA Arrays Kenichi Takahashi, Jiang Li, Hiroki Isogai, Hiroki Banba, Hakaru Tamukoh, Masatoshi Sekine (TUAT) RECONF2010-39 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In recent years, HPC system architectures comprised of GPUs or FPGAs are becoming common. We propose a Reconfigurable HPC system based on a hardware/software complex system model including FPGAs, and compare its performance with CPU Clusters and CUDA based GPGPU implementations. In addition, we discuss the merits of using a hw/sw complex system which include integral components generated by high-level programming languages. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
hw/sw complex system / FPGA / Reconfigurable HPC / GPGPU / High-Level Synthesis Tool / / / |
Reference Info. |
IEICE Tech. Rep., vol. 110, no. 319, RECONF2010-39, pp. 1-6, Nov. 2010. |
Paper # |
RECONF2010-39 |
Date of Issue |
2010-11-23 (RECONF) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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Download PDF |
RECONF2010-39 |