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Paper Abstract and Keywords
Presentation 2011-01-20 11:00
Performance Evaluation of 3D FPGA with Homogeneous Tileable Structure
Naoto Miyamoto (Tohoku Univ.), Hanpei Koike (AIST), Yohei Matsumoto (Kaiyo Univ.), Tadayuki Matsumura, Kenichi Osada, Yahoko Nakagawa, Keisuke Toyama (ASET), Tadahiro Ohmi (Tohoku Univ.) Link to ES Tech. Rep. Archives: ICD2010-130
Abstract (in Japanese) (See Japanese page) 
(in English) 3D LSI fabrication is a promising technology as a representative of "More Than Moore" stream. 3D FPGA is one of the killer applications of the 3D LSI platform because FPGA requires a lot of wire segments. We have developed a true-3D CAD tool for 3D FPGAs. By using this tool we have conducted a place-and-route experiment of 3D FPGAs with homogeneous tileable structure. The evaluation results show that 3D FPGA is superior to 2D FPGAs in terms of wire delay.
Keyword (in Japanese) (See Japanese page) 
(in English) 3D FPGA / True-3D CAD Tool / / / / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 380, ICD2010-130, pp. 13-18, Jan. 2011.
Paper # ICD2010-130 
Date of Issue 2011-01-13 (ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF Link to ES Tech. Rep. Archives: ICD2010-130

Conference Information
Committee ICD IPSJ-ARC  
Conference Date 2011-01-20 - 2011-01-21 
Place (in Japanese) (See Japanese page) 
Place (in English) Keio University (Hiyoshi Campus) 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ICD 
Conference Code 2011-01-ICD-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Performance Evaluation of 3D FPGA with Homogeneous Tileable Structure 
Sub Title (in English)  
Keyword(1) 3D FPGA  
Keyword(2) True-3D CAD Tool  
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1st Author's Name Naoto Miyamoto  
1st Author's Affiliation Tohoku University (Tohoku Univ.)
2nd Author's Name Hanpei Koike  
2nd Author's Affiliation Advanced Industrial Science and Technology (AIST)
3rd Author's Name Yohei Matsumoto  
3rd Author's Affiliation Tokyo University of Marine Science and Technology (Kaiyo Univ.)
4th Author's Name Tadayuki Matsumura  
4th Author's Affiliation Association of Super-Advanced Electronics Technologies (ASET)
5th Author's Name Kenichi Osada  
5th Author's Affiliation Association of Super-Advanced Electronics Technologies (ASET)
6th Author's Name Yahoko Nakagawa  
6th Author's Affiliation Association of Super-Advanced Electronics Technologies (ASET)
7th Author's Name Keisuke Toyama  
7th Author's Affiliation Association of Super-Advanced Electronics Technologies (ASET)
8th Author's Name Tadahiro Ohmi  
8th Author's Affiliation Tohoku University (Tohoku Univ.)
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Date Time 2011-01-20 11:00:00 
Presentation Time 30 minutes 
Registration for ICD 
Paper # ICD2010-130 
Volume (vol) vol.110 
Number (no) no.380 
Page pp.13-18 
#Pages
Date of Issue 2011-01-13 (ICD) 


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