Paper Abstract and Keywords |
Presentation |
2011-01-28 14:15
1GS/s Current Mode Pipeline ADC in 90nm CMOS Kei Ando, Takashi Nozawa, Ta Tuan Thanh, Shoichi Tanifuji, Suguru Kameda, Noriharu Suematsu, Tadashi Takagi, Kazuo Tsubouchi (Tohoku Univ.) SR2010-83 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In heterogeneous wireless network, multimode tranceiver for various wireless system is needed. We have
already proposed a scalable analog-to-disital converter (ADC) which can change sampling frequency and resolution
for wireless specification. For the proposed scalable ADC, time-interleaving technique and pipeline archtecture are
adopted. To change sampling frequency, the proposed ADC switches a number of parallel ADCs. To change resolution,
the ADC switches a number of pipeline stages. The proposed ADC is designed in 90nm Si complementary metal oxide semiconductor (CMOS) with current mode constitution to reduce deterioration of conversion accuracy
by microfabrication and to improve sampling speed. We fabricated 5bit 1GS/s current mode pipeline ADC for WPAN(wireless personal area network). By DC measurent, the 5bit 1GS/s ADC has no miscode and increases monotonically. By AC simulation with 11.17MHz input, the ADC achieved signal to noise ratio (SNR) of 27.3dB,spurious free dynamic range (SFDR) of 44.6dB,signal to noise and distortion ratio (SNDR) of 7.2dB,effective
number of bits (ENOB) of 4.22bit,and power consumption of 45mW. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
ADC / Pipeline / Current Mode / Wireless System / 90nm Si-CMOS / / / |
Reference Info. |
IEICE Tech. Rep., vol. 110, no. 398, SR2010-83, pp. 89-94, Jan. 2011. |
Paper # |
SR2010-83 |
Date of Issue |
2011-01-20 (SR) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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SR2010-83 |
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